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116A Datasheet(PDF) 77 Page - Renesas Technology Corp |
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116A Datasheet(HTML) 77 Page - Renesas Technology Corp |
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77 / 102 page ![]() REJ03B0297-0100 Rev.1.00 Page 77 of 99 Jul 16, 2010 R32C/116A Group 5. Electrical Characteristics VCC =5V Switching Characteristics (VCC = 4.2 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted) Note: 1. The value is calculated by the following formulas based on the base clock cycles (tc(Base)) and respective cycles of Tsu(A-R), Tw(R), Tsu(A-W), and Tw(W) set by registers EBC0 to EBC3. If the calculation results in a negative value, modify the value to be set. For the details of how to set values, refer to the User’s manual. tsu(S-R) = tsu(A-R) = Tsu(A-R) × tc(Base) - 15 [ns] tw(R) = Tw(R) × tc(Base) - 10 [ns] tsu(S-W) = tsu(A-W) = Tsu(A-W) × tc(Base) - 15 [ns] tw(W) = tsu(D-W) = Tw(W) × tc(Base) - 10 [ns] Table 5.35 External Bus Timing (Separate bus) Symbol Characteristic Measurement condition Value Unit Min. Max. tsu(S-R) Chip-select setup time for read Refer to Figure 5.6 (1) ns th(R-S) Chip-select hold time after read tc(Base) -15 ns tsu(A-R) Address setup time for read (1) ns th(R-A) Address hold time after read tc(Base) -15 ns tw(R) Read pulse width (1) ns tsu(S-W) Chip-select setup time for write (1) ns th(W-S) Chip-select hold time after write 1.5 × tc(Base) -15 ns tsu(A-W) Address setup time for write (1) ns th(W-A) Address hold time after write 1.5 × tc(Base) -15 ns tw(W) Write pulse width (1) ns tsu(D-W) Data setup time for write (1) ns th(W-D) Data hold time after write 0ns |
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