PCA85232DA datasheet(24/54 Pages) NXP

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PCA85232

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Product data sheet

Rev. 1 — 8 December 2010

24 of 54

NXP Semiconductors

PCA85232

LCD driver for low multiplex rates

7.16.4 I2C-bus controller

The PCA85232 acts as an I2C-bus slave receiver. It does not initiate I2C-bus transfers or

transmit data to an I2C-bus master receiver. The only data output from the PCA85232 are

the acknowledge signals from the selected devices. Device selection depends on the

I2C-bus slave address, on the transferred command data, and on the hardware

subaddress.

In single device applications, the hardware subaddress inputs A0 and A1 are normally tied

to VSS which defines the hardware subaddress 0. In multiple device applications

A0 and A1 are tied to VSS or VDD in accordance with a binary coding scheme such that no

two devices with a common I2C-bus slave address have the same hardware subaddress.

7.16.5 Input filters

To enhance noise immunity in electrical adverse environments, RC low-pass filters are

provided on the SDA and SCL lines.

7.16.6 I2C-bus protocol

Two I2C-bus slave addresses (0111 000 and 0111 001) are reserved for the

PCA85232.The entire I2C-bus slave address byte is shown in Table 7.

The PCA85232 is a write-only device and will not respond to a read access, therefore bit 0

should always be logic 0. Bit 1 of the slave address byte, that a PCA85232 will respond to,

is defined by the level tied to its SA0 input (VSS for logic 0 and VDD for logic 1).

Having two reserved slave addresses allows the following on the same I2C-bus:

• Up to 8 PCA85232 on the same I2C-bus for very large LCD applications

• The use of two types of LCD multiplex on the same I2C-bus

The I2C-bus protocol is shown in Figure 17. The sequence is initiated with a START

condition (S) from the I2C-bus master which is followed by one of two possible PCA85232

slave addresses available. All PCA85232 with the corresponding SA0 level acknowledge

in parallel to the slave address, but all PCA85232 with the alternative SA0 level ignore the

whole I2C-bus transfer.

Table 7.

I2C slave address byte

Slave address

Bit

MSB

LSB

SA0

R/W

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