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MPC8315E Datasheet(PDF) 101 Page - Freescale Semiconductor, Inc

Part # MPC8315E
Description  PowerQUICC??II Pro Processor Hardware Specifications
PDF  112 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8315E Datasheet(HTML) 101 Page - Freescale Semiconductor, Inc

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MPC8315E PowerQUICC™ II Pro Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
101
Thermal (Preliminary)
25 Thermal (Preliminary)
This section describes the thermal specifications of the MPC8315E.
25.1
Thermal Characteristics
Table 78 provides the package thermal characteristics for the 620 29
× 29 mm TEPBGA II.
3
0010
0000100
66.67
133.33
266.66
4
0100
0000101
33.33
133.33
333.33
5
0101
0000101
25
125
312.5
6
0010
0000101
66.67
133.33
333.33
7
0101
0000110
25
125
375
8
0100
0000110
33.33
133.33
400
9
0010
0000110
66.67
133.33
400
Table 78. Package Thermal Characteristics for TEPBGA II
Characteristic
Board type
Symbol
Value
Unit
Notes
Junction to ambient natural convection
Single layer board (1s)
RθJA
23
°C/W
1, 2
Junction to ambient natural convection
Four layer board (2s2p)
RθJA
16
°C/W
1, 2, 3
Junction to ambient (@200 ft/min)
Single layer board (1s)
RθJMA
18
°C/W
1, 3
Junction to ambient (@200 ft/min)
Four layer board (2s2p)
RθJMA
13
°C/W
1, 3
Junction to board
—
RθJB
8°C/W
4
Junction to case
—
RθJC
6°C/W
5
Junction to package top
Natural convection
Ψ
JT
6°C/W
6
Notes:
1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2. Per JEDEC JESD51-2 with the single layer board horizontal. Board meets JESD51-9 specification.
3. Per JEDEC JESD51-6 with the board horizontal.
4. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured
on the top surface of the board near the package.
5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
6. Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
as Psi-JT.
Table 77. Suggested PLL Configurations
Conf. No.
SPMF
Core\PLL
Input Clock Frequency (MHz) CSB Frequency (MHz) Core Frequency (MHz)



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