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PPC8567ECVTAQJGA Datasheet(PDF) 59 Page - Freescale Semiconductor, Inc |
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PPC8567ECVTAQJGA Datasheet(HTML) 59 Page - Freescale Semiconductor, Inc |
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59 / 139 page ![]() MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1 Freescale Semiconductor 59 PCI 12 PCI This section describes the DC and AC electrical specifications for the PCI bus of the MPC8568E. 12.1 PCI DC Electrical Characteristics Table 48 provides the DC electrical characteristics for the PCI interface. 12.2 PCI AC Electrical Specifications This section describes the general AC timing parameters of the PCI bus. Note that the SYSCLK signal is used as the PCI input clock. Table 49 provides the PCI AC timing specifications at 66 MHz. Table 48. PCI DC Electrical Characteristics 1 Parameter Symbol Min Max Unit High-level input voltage VIH 0.5*OVDD OVDD + 0.3 V Low-level input voltage VIL –0.5 0.3*OVDD V Input current (VIN 1= 0 V or V IN = VDD) IIN — ±10 μA High-level output voltage (OVDD = min, IOH = –500 μA) VOH 0.9*OVDD —V Low-level output voltage (OVDD = max, IOL = 1500 μA) VOL —0.1*OVDD V Notes: 1. The symbol VIN, in this case, represents the OVIN symbol referenced in Table 2 and Table 3. Table 49. PCI AC Timing Specifications at 66 MHz Parameter Symbol 1 Min Max Unit Notes SYSCLK to output valid tPCKHOV — 6.0 ns 2, 3 Output hold from SYSCLK tPCKHOX 2.0 — ns 2, 10 SYSCLK to output high impedance tPCKHOZ — 14 ns 2, 4, 11 Input setup to SYSCLK tPCIVKH 3.0 — ns 2, 5, 10 Input hold from SYSCLK tPCIXKH 0 — ns 2, 5, 10 |
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