PPC8567ECVTAQJGA datasheet(96/139 Pages) FREESCALE

96 / 139 page

MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

HDLC, BISYNC, Transparent and Synchronous UART

Figure 64 shows the Utopia timing with internal clock.

Figure 64. Utopia AC Timing (Internal Clock) Diagram

21 HDLC, BISYNC, Transparent and Synchronous UART

This section describes the DC and AC electrical specifications for the high level data link control (HDLC),

BISYNC, transparent and synchronous UART of the MPC8568E.

21.1 HDLC, BISYNC, Transparent and Synchronous UART DC Electrical

Characteristics

Table 75 provides the DC electrical characteristics for the MPC8568E HDLC, BISYNC, Transparent and

Synchronous UART protocols.

21.2 HDLC, BISYNC, Transparent and Synchronous UART AC Timing

Specifications

Table 76 provides the input and output AC timing specifications for HDLC, BiSync, Transparent and

Synchronous UART protocols.

Table 75. HDLC, BiSync, Transparent and Synchronous UART DC Electrical Characteristics

Characteristic

Symbol

Condition

Min

Max

Unit

Output high voltage

VOH

IOH = –2.0 mA

2.4

—

Output low voltage

VOL

IOL = 3.2 mA

—

0.5

Input high voltage

VIH

—2.0

OVDD+0.3

Input low voltage

VIL

—-0.3

0.8

Input current

IIN

0 V

≤ VIN ≤ OVDD

—

± 10

μA

Table 76. HDLC, BiSync, Transparent AC Timing Specifications 1

Characteristic

Symbol 2

Min

Max

Unit

Outputs—Internal clock delay

tHIKHOV

06.5

Outputs—External clock delay

tHEKHOV

UtopiaCLK (output)

tUIIXKH

tUIKHOV

Input Signals:

Utopia

Output Signals:

Utopia

tUIIVKH

tUIKHOX

PPC8567ECVTAQJGA Datasheet(PDF) 96 Page - Freescale Semiconductor, Inc

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