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AT91SAM7L64 Datasheet(PDF) 13 Page - ATMEL Corporation |
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AT91SAM7L64 Datasheet(HTML) 13 Page - ATMEL Corporation |
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13 / 564 page ![]() 13 6257A–ATARM–20-Feb-08 AT91SAM7L128/64 Preliminary Table 5-1 on page 13 shows an example of backup mode with backup SRAM and RTC running. When entering this mode, all PIO pins keep their previous states, they are reinitialized as inputs with pull-ups at wake-up. The AT91SAM7L128/64 can be awakened from this mode through the FWUP pin, an event on WUP0-15 pins, or an RTC alarm or brownout event. Current consumption is 3.5 µA typical without the LCD controller running. 5.2.3 Wait Mode In wait mode, the voltage regulator must be set in deep mode. Voltage regulator output voltage should be set at a minimum voltage to decrease leakage in the digital core. No clock is running in the core. From this mode, a fast start-up is available (refer to Section 5.4 ”Fast Start-Up”). In this mode, all PIO pins keep their previous states. 5.2.4 Idle Mode The processor is in idle mode which means that the processor has no clock but the Master clock (MCK) remains running. The processor can also be wakened by an IRQ or FIQ. 5.2.5 Active Mode The total dynamic power consumption is less than 30 mA at full speed (36 MHz) when running out of the Flash. The power management controller can be used to adapt the frequency and the regulator output voltage can be adjusted to optimize power consumption. 5.2.6 Low Power Mode Summary Table The modes detailed above are the main modes. In off mode, no options are available but once the shutdown controller is set to on, each part can be set to on, or off, separately and more modes can be active. The table below shows a summary of the configurations of the low power modes. Notes: 1. When considering wake-up time, the time required to start the PLL is not taken into account. Once started, the AT91SAM7128/L64 works with the 2 MHz Fast RC oscillator. The user has to add the PLL start-up time if it is needed in the system. The wake-up time is defined as the time taken for wake up until the first instruction is fetched. 2. The external LCD current consumption and the external loads on PIOs are not taken into account in the calculation. 3. BOD current consumption is not included. 4. Depends on MCK frequency. Table 5-1. Low Power Mode Configuration Summary Mode FWUP SUPC, 32 kHz Oscillator, POR RTC Backup SRAM Regulator (Deep Mode) Core Potential Wake-up Sources Consumption (2)(3) Wake-up Time (1) Off Mode X FWUP pin 100 nA typ < 5 ms Backup Mode (with SRAM and RTC) XX X X FWUP pin WUP0-15 pins BOD alarm RTC alarm 3.5 µA typ < 0.5 ms Wait Mode (with SRAM and RTC) XX X X X X Fast start-up through WUP0-15 pins 9 µA typ < 2 µs (in case of fast start-up) Idle Mode X X X X X IRQs FIQ (4) (4) |
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