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LC72709W Datasheet(PDF) 13 Page - Sanyo Semicon Device |
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LC72709W Datasheet(HTML) 13 Page - Sanyo Semicon Device |
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13 / 16 page ![]() on Post Error Correction Output Data”) concerning data with no errors. Stated simply, this IC does not output data unnecessarily. For example, the INT signal will not be output for data from a received station that is not broadcasting multiplexed data. Also, under good reception conditions where there are no errors, there will be no post-vertical correction output and the INT signal period will be 18 ms. There are cases where it may become impossible to acquire the data if the microcontroller software includes the data acquisition conditions required for the LC72700E. For example, this problem may occur if the software was designed to use only the post-vertical correction output. Since this IC does not output the same data twice and does not output bad data at all, applications do not need to select from the input data if they simply acquire all data that starts at every INT signal. (In other words, it can be also said that this IC does not generate any unnecessary interrupt signals.) To set up this IC to provide the same output format as that of the LC72700E, applications must set bit 5 (INT MODE) in the control register to 1. Note that this IC is added a control function that causes the IC not to output post-vertical correction data if the vertical correction operation was not executed. Since this control function is not influenced by the INT MOVE flag, post-vertical correction output is not provided during error-free reception even if the INT MOVE flag was set. Thus care is required in application software design. Methods for Supporting the Different Frame Formats Applications can handle the A, A’, B, and C frame formats by setting bits 0 (FRAME), 1 (RTIB), and 2 (VEC HALT) in the control register appropriately. The default values are appropriate for method B. Note that since the IC itself does not provide any functions for recognizing the frame structure, applications must set these bits using the serial data transfer function. No. 5876-13/16 LC72709E, 72709W While the VEC HALT flag allows method C to be handled, the information related to the block number and the information related to frame synchronization in the status output will be invalid. Invalid status: CNT1: Bit 5 FIL Frame synchronization information CNT1: Bit 3 PRI Parity packet information CNT1: Bit 2 HEAD Frame head information CNT1: Bit 0 RTIB RTIB information CNT2: Data block number and parity packet number information (*) RTIB: Real Time Information Blocks METHOD FRAME (Bit 0) RTB (Bit 1) VEC HALT (Bit 2) A H H L No interleaves A’ H L L A + RTIB (*) B L — L Interleaving C — — H Block data only |
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