HT66F13 datasheet(101/173 Pages) HOLTEK

101 / 173 page

Rev. 1.10

101

February 9, 2011

HT66F13/HT66F14/HT66F15

Enhanced A/D Flash Type MCU

Counter Value

CCRP

CCRA

TnON

TnPAU

TnAPOL

CCRA Int.

Flag TnAF

CCRB Int.

Flag TnBF

TPnA Pin

(TnAOC=1)

Time

Counter Cleared by CCRP

Pause

Resume

Stop

Counter

Restart

TnCCLR = 0;

TnAM [1:0] = 10, TnBM [1:0] = 10;

TnPWM [1:0] = 00

Output Pin

Reset to Initial value

Output controlled by

other pin-shared function

Output Inverts

when TnAPOL

is high

CCRB

CCRP Int.

Flag TnPF

TPnB Pin

(TnBOC=1)

TPnB Pin

(TnBOC=0)

Duty Cycle

set by CCRA

Duty Cycle

set by CCRB

PWM Period set by CCRP

Duty Cycle

set by CCRA

Duty Cycle

set by CCRA

ETM PWM Mode -- Edge Aligned

Note:

1. Here TnCCLR=0 therefore CCRP clears counter and determines the PWM period

2. The internal PWM function continues running even when TnAIO [1:0] (or TnBIO [1:0]) = 00 or 01

3. CCRA controls the TPnA PWM duty and CCRB controls the TPnB PWM duty

HT66F13 Datasheet(PDF) 101 Page - Holtek Semiconductor Inc

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