HT66F13 datasheet(103/173 Pages) HOLTEK

103 / 173 page

Rev. 1.10

103

February 9, 2011

HT66F13/HT66F14/HT66F15

Enhanced A/D Flash Type MCU

Counter Value

CCRP

CCRA

TnON

TnPAU

TnAPOL

CCRA Int.

Flag TnAF

CCRB Int.

Flag TnBF

TPnA Pin

(TnAOC=1)

Time

Pause

Resume

Stop

Counter

Restart

TnCCLR = 0;

TnAM [1:0] = 10, TnBM [1:0] = 10;

TnPWM [1:0] = 11

Output Pin

Reset to Initial value

Output controlled by

Other pin-shared function

Output Inverts

when TnAPOL

is high

CCRB

CCRP Int.

Flag TnPF

TPnB Pin

(TnBOC=1)

TPnB Pin

(TnBOC=0)

Duty Cycle set by CCRA

Duty Cycle set by CCRB

PWM Period set by CCRP

ETM PWM Mode -- Centre Aligned

Note:

1. Here TnCCLR=0 therefore CCRP clears the counter and determines the PWM period

2. TnPWM [1:0] =11 therefore the PWM is centre aligned

3. The internal PWM function continues running even when TnAIO [1:0] (or TnBIO [1:0]) = 00 or 01

4. CCRA controls the TPnA PWM duty and CCRB controls the TPnB PWM duty

5. CCRP will generate an interrupt request when the counter decrements to its zero value

HT66F13 Datasheet(PDF) 103 Page - Holtek Semiconductor Inc

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