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MSP430F6632IPZ Datasheet(PDF) 13 Page - Texas Instruments |
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MSP430F6632IPZ Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 105 page ![]() MSP430F663x www.ti.com SLAS566A – JUNE 2010 – REVISED JULY 2010 Terminal Functions (continued) TERMINAL NO. I/O(1) DESCRIPTION NAME PZ ZQW General-purpose digital I/O P5.7/RTCCLK 88 D7 I/O RTCCLK output DVCC3 89 A6 Digital power supply DVSS3 90 A5 Digital ground supply Test mode pin – select digital I/O on JTAG pins TEST/SBWTCK 91 B6 I Spy-bi-wire input clock General-purpose digital I/O PJ.0/TDO 92 B5 I/O Test data output port General-purpose digital I/O PJ.1/TDI/TCLK 93 A4 I/O Test data input or test clock input General-purpose digital I/O PJ.2/TMS 94 E7 I/O Test mode select General-purpose digital I/O PJ.3/TCK 95 D6 I/O Test clock Reset input active low RST/NMI/SBWTDIO 96 A3 I/O Non-maskable interrupt input Spy-bi-wire data input/output General-purpose digital I/O P6.0/CB0/A0 97 B4 I/O Comparator_B input CB0 Analog input A0 – ADC (not available on '6632, '6631, '6630 devices) General-purpose digital I/O P6.1/CB1/A1 98 B3 I/O Comparator_B input CB1 Analog input A1 – ADC (not available on '6632, '6631, '6630 devices) General-purpose digital I/O P6.2/CB2/A2 99 A2 I/O Comparator_B input CB2 Analog input A2 – ADC (not available on '6632, '6631, '6630 devices) General-purpose digital I/O P6.3/CB3/A3 100 D5 I/O Comparator_B input CB3 Analog input A3 – ADC (not available on '6632, '6631, '6630 devices) E5 E6 E8 F4 F5 Reserved BGA package balls. It is recommended to connect to ground Reserved N/A F8 (DVSS/AVSS). G5 G8 H5 H8 H9 Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 13 |
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