LPC1850 datasheet(83/142 Pages) NXP

83 / 142 page

LPC1850_30_20_10

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Preliminary data sheet

Rev. 2.2 — 9 September 2011

83 of 142

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

Limiting values

[1]

The following applies to the limiting values:

a) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive

static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated

maximum.

b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless

otherwise noted.

[2]

2.0 V if VBAT

 2.2 V.

[3]

Including voltage on outputs in 3-state mode; at 2.0 V the speed will be reduced.

[4]

The peak current is limited to 25 times the corresponding maximum current.

[5]

Dependent on package type.

[6]

Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k

 series resistor.

Table 6.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).[1]

Symbol

Parameter

Conditions

Min

Max

Unit

VDD(REG)(3V3)

regulator supply voltage

(3.3 V)

on pin VDDREG

2.2[2]

3.6

VDD(IO)

input/output supply

voltage

on pin VDDIO

2.2

3.6

VDDA(3V3)

analog supply voltage

(3.3 V)

on pin VDDA

2.0

3.6

VBAT

battery supply voltage

on pin VBAT

2.2

3.6

VDD(3V3)

supply voltage (3.3 V)

on pin VDD; LQFP100 package

only

2.2

3.6

Vprog(pf)

polyfuse programming

voltage

on pin VPP

2.7

3.6

input voltage

only valid when the VDD(IO) supply

voltage is present

5 V tolerant I/O pins (see

Table 3)

[3]

0.5

5.5

ADC/DAC pins and digital I/O

pins configured for an analog

function (see Table 3)

<tbd>

VDDA(3V3)

USB1 pins USB1_DP and

USB1_DM (see Table 3)

<tbd>

IDD

supply current

per supply pin

[4] -

<tbd>

ISS

ground current

per ground pin

[4] -

<tbd>

Ilatch

I/O latch-up current

(0.5V

DD(IO)) < VI < (1.5VDD(IO));

Tj < 125 C

<tbd>

Tstg

storage temperature

[5] <tbd>

<tbd>

C

Ptot(pack)

total power dissipation

(per package)

based on package heat transfer,

not device power consumption

<tbd>

VESD

electrostatic discharge

voltage

human body model; all pins

[6] <tbd>

<tbd>

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