LPC1850 datasheet(86/142 Pages) NXP

86 / 142 page

LPC1850_30_20_10

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Preliminary data sheet

Rev. 2.2 — 9 September 2011

86 of 142

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

Digital pins - RESET pin

VIH

HIGH-level input

voltage

[8] 0.8

 (V

ps 

0.35)

-5.5

VIL

LOW-level input voltage

[8]

0.5

0.3

 (V

ps 

0.1)

Vhys

hysteresis voltage

[8] 0.05

 (V

 0.35)

--V

Digital pins - normal drive strength

IIL

LOW-level input current VI = 0 V; on-chip pull-up

resistor disabled

--<tbd>

A

IIH

HIGH-level input

current

VI =VDD(IO); on-chip

pull-down resistor

disabled

--<tbd>

A

IOZ

OFF-state output

current

VO =0V; VO =VDD(IO);

on-chip pull-up/down

resistors disabled

--<tbd>

A

input voltage

pin configured to provide

a digital function

[10]

0.5

<tbd>

output voltage

output active

<tbd>

VDD(IO)

VIH

HIGH-level input

voltage

2.0

5.5

VIL

LOW-level input voltage

0.5

0.8

Vhys

hysteresis voltage

0.1VDD(IO)

--V

VOH

HIGH-level output

voltage

IOH = 6 mA

VDD(IO) 

0.4

--V

VOL

LOW-level output

voltage

IOL = 6 mA

--0.4

IOH

HIGH-level output

current

VOH =VDD(IO)  0.4 V

--mA

IOL

LOW-level output

current

VOL = 0.4 V

--mA

IOHS

HIGH-level short-circuit

output current

drive HIGH; connected to

ground

[11] --35

IOLS

LOW-level short-circuit

output current

drive LOW; connected to

VDD(IO)

[11] --30

Ipd

pull-down current

VI =VDD(IO)

<tbd>

A

Ipu

pull-up current

VI = 0 V

<tbd>

A

VDD(IO) <VI < 3.6 V

<tbd>

A

Rpu(weak)

weak pull-up resistance VI = 0 V

4550

65k



Rpd(weak)

weak pull-down

resistance

VI =VDD(IO)



Table 8.

Static characteristics …continued

Tamb = 40 C to +85 C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

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