HT16C21 datasheet(10/34 Pages) HOLTEK

10 / 34 page

Rev. 1.00

November 22, 2011

HT16C21

Output

COM7/

SEG3

COM6/

SEG2

COM5/

SEG1

COM4/

SEG0

COM3

COM2

COM1

COM0

address

SEG4

00H

SEG5

01H

SEG6

02H

SEG7

03H

SEG8

04H

SEG9

05H

SEG10

06H

SEG11

07H

SEG12

08H

SEG13

09H

SEG14

0AH

SEG15

0BH

SEG16

0CH

SEG17

0DH

SEG18

0EH

SEG19

0FH

Data

RAM mapping of 16x8 display mode

MSB

LSB

LCD

LED0

LED1

LED2

LED3

LED4

LED5

LED6

LED7

LED

Display data transfer format for I2C interface

System Oscillator

The timing for the internal logic and the LCD drive signals are generated by an internal oscillator. The System

Clock frequency (fSYS) determines the LCD frame frequency. During initial system power on the System Oscillator

will be in the stop state.

LCD Bias Generator

The full-scale LCD voltage (VOP) is obtained from (VLCD – VSS). The LCD voltage may be temperature

compensated externally through the Voltage supply to the VLCD pin.

Fractional LCD biasing voltages, known as 1/3 or 1/4 bias voltage, are obtained from an internal voltage divider of

four series resistors connected between VLCD and VSS. The centre resistor can be switched out of circuits to provide

a 1/3bias voltage level configuration.

HT16C21 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc

HT16C21 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc

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