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HT46R92 Datasheet(PDF) 22 Page - Holtek Semiconductor Inc |
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HT46R92 Datasheet(HTML) 22 Page - Holtek Semiconductor Inc |
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22 / 61 page ![]() HT46R92 Rev. 1.10 22 November 5, 2008 the timer begin further pulse width measurements. In this way, single shot pulse measurements can be easily made. It should be noted that in this mode the Timer/Event Counter is controlled by logical transitions on the exter- nal timer pin and not by the logic level. When the Timer/Event Counter is full and overflows, an interrupt signal is generated and the Timer/Event Counter will re- load the value already loaded into the preload register and continue counting. The interrupt can be disabled by ensuring that the Timer/Event Counter Interrupt Enable bit in the Interrupt Control Register is reset to zero. As the external timer pin is shared with an I/O pin, to en- sure that the pin is configured to operate as pulse width measurement pins, two things have to happen. The first is to ensure that the Operating Mode Select bits in the Timer Control Register place the related Timer/Event Counter in the Pulse Width Measurement Mode. The second is to ensure that the port control register configures the timer pin as an input. Prescaler Bits PSC0~PSC2 of the TMRC register can be used to define the pre-scaling stages of the internal clock source for the Timer/Event Counters. In the Event Counter Mode the prescaler has no effect. I/O Interfacing The Timer/Event Counter, when configured to run in the Event Counter or Pulse Width Measurement Mode, re- quires the use of the external PA2/TMR pin for correct operation. As this pin is a shared pin it must be config- ured correctly to ensure it is setup for use as a Timer/Event Counter input and not as a normal I/O pin. This is implemented by ensuring that the mode select bits in the Timer/Event Counter control register, select either the Event Counter or Pulse Width Measurement Mode. Additionally the Port Control Register PAC bit 2 must be set high to ensure that the pin is setup as an in- put. Any pull-high resistor configuration option on this pin will remain valid even if the pin is used as a Timer/Event Counter input. Programming Considerations When configured to run in the timer mode, one of the in- ternal clocks is used as the timer clock source and is therefore synchronised with the overall operation of the microcontroller. In this mode when the appropriate timer register is full, the microcontroller will generate an inter- nal interrupt signal directing the program flow to the re- spective internal interrupt vector. For the pulse width measurement mode, one of the internal system clocks is also used as the timer clock source but the timer will only run when the correct logic condition appears on the external timer input pin. As this is an external event and not synchronised with the internal timer clock, the microcontroller will only see this external event when the next timer clock pulse arrives. As a result, there may be small differences in measured values requiring pro- grammers to take this into account during programming. The same applies if the timer is configured to be in the event counting mode, which again is an external event and not synchronised with the internal system or timer clock. When the Timer/Event Counter is read, or if data is writ- ten to the preload register, the clock is inhibited to avoid errors, however as this may result in a counting error, this should be taken into account by the programmer. Care must be taken to ensure that the timers are properly in- itialised before using them for the first time. The associ- ated timer enable bits in the interrupt control register must be properly set otherwise the internal interrupt associated with the timer will remain inactive. The edge select, timer mode and clock source control bits in timer control regis- ter must also be correctly set to ensure the timer is prop- erly configured for the required application. It is also important to ensure that an initial value is first loaded into the timer registers before the timer is switched on; this is because after power-on the initial values of the timer reg- isters are unknown. After the timer has been initialised the timer can be turned on and off by controlling the en- able bit in the timer control register. Note that setting the timer enable bit high to turn the timer on, should only be executed after the timer mode bits have been properly setup. Setting the timer enable bit high together with a mode bit modification, may lead to improper timer oper- ation if executed as a single timer control register byte write instruction. When the Timer/Event counter overflows, its corre- sponding interrupt request flag in the interrupt control register will be set. If the timer interrupt is enabled this will in turn generate an interrupt signal. However irre- spective of whether the interrupts are enabled or not, a Timer/Event counter overflow will also generate a wake-up signal if the device is in a Power-down condi- tion. This situation may occur if the Timer/Event Counter is in the Event Counting Mode and if the external signal continues to change state. In such a case, the Timer/Event Counter will continue to count these exter- nal events and if an overflow occurs the device will be woken up from its Power-down condition. To prevent such a wake-up from occurring, the timer interrupt re- quest flag should first be set high before issuing the HALT instruction to enter the Power Down Mode. |
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