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DM9302 Datasheet(PDF) 15 Page - Davicom Semiconductor, Inc. |
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DM9302 Datasheet(HTML) 15 Page - Davicom Semiconductor, Inc. |
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15 / 64 page  DM9302 10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus Preliminary datasheet 15 DM9302-15-DS-P01 July 30, 2009 6. CONTROL AND STATUS REGISTER SET The DM9302 implements several control and status registers (CSR), which can be accessed by the host. All CSR are set to their default values by power on or software reset unless specified. Register Description Offset Default value after reset NCR Network Control Register 00H 00H NSR Network Status Register 01H 00H TCR TX Control Register 02H 00H RCR RX Control Register 05H 00H RSR RX Status Register 06H 00H ROCR Receive Overflow Counter Register 07H 00H FCR Flow Control Register 0AH 00H EPCR EEPROM & PHY Control Register 0BH 00H EPAR EEPROM & PHY Address Register 0CH 40H EPDRL EEPROM & PHY Low Byte Data Register 0DH 00H EPDRH EEPROM & PHY High Byte Data Register 0EH 00H LCCR Link Change Control Register (0FH) 0FH 00H PAR Processor Port Physical Address Registers 10H-15H by EEPROM MAR Processor Port Multicast Address Registers 16H-1DH XXH RXPLLR RX Packet Length Low Register 20H 00H RXPLHR RX Packet Length High Register 21H 00H RASR RX Additional Status Register 26H 00H RACR RX Additional Control Register 27H 00H VID Vendor ID Registers 28H-29H 0A46H CHIPR CHIP Revision Registers 2CH 01H TCSCR Transmit Check Sum Control Register 31H 00H RCSCSR Receive Check Sum Control Status Register 32H 00H DRIVER uP Data Bus driving capability Register 38H 00H IRQCR IRQ Pin Control Register 39H 00H SWITCHCR Switch Control Register 52H 00H VLANCR VLAN Control Register 53H 00H DSP1,2 DSP Control Register I,II 58H~59H 0000H P_INDEX Per Port Control/Status Index Register 60H 00H P_CTRL Per Port Control Data Register 61H 00H P_STUS Per Port Status Data Register 62H 00H P_RATE Per Port Ingress and Egress Rate Control Register 66H 00H P_BW Per Port Bandwidth Control Setting Register 67H 00H P_UNICAST Per Port Block Unicast Ports Control Register 68H 00H P_MULTI Per Port Block Multicast Ports Control Register 69H 00H P_BCAST Per Port Block Broadcast Ports Control Register 6AH 00H P_UNKNWN Per Port Block Unknown Ports Control Register 6BH 00H P_PRI Per Port Priority Queue Control Register 6DH 00H VLAN_TAGL Per Port VLAN Tag Low Byte Register 6EH 01H VLAN_TAGH Per Port VLAN Tag High Byte Register 6FH 00H P_MIB_IDX Per Port MIB counter Index Register 80H 00H MIB_DAT MIB counter Data Register bit 0~7 81H 00H |
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