THS6204IPWPR datasheet(28/43 Pages) TI

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DISTORTION PERFORMANCE

DRIVING CAPACITIVE LOADS

THS6204

SBOS416C – OCTOBER 2007 – REVISED APRIL 2009 ................................................................................................................................................... www.ti.com

series resistor may be included in the supply lines.

connections to multiple devices can easily cause this

Under heavy output loads this will reduce the

value to be exceeded. Always consider this effect

available output voltage swing. A 5

Ω series resistor in

carefully, and add the recommended series resistor

each power-supply lead will limit the internal power

as close as possible to the THS6204 output pin (see

dissipation to less than 1W for an output short circuit

the Board Layout Guidelines section).

while decreasing the available output voltage swing

only 0.5V for up to 100mA desired load currents.

Always place the 0.1

µF power-supply decoupling

The THS6204 provides good distortion performance

capacitors after these supply current limiting resistors

into a 100

Ω load on ±12V supplies. Relative to

directly on the supply pins.

alternative

solutions,

provides

exceptional

performance into lighter loads and/or operation on a

dual ±6V supply. Generally, until the fundamental

One of the most demanding and yet very common

signal reaches very high frequency or power levels,

load conditions for an op amp is capacitive loading.

the second harmonic dominates the distortion with a

Often, the capacitive load is the input of an

negligible third harmonic component. Focusing then

ADC—including additional external capacitance that

the

second

harmonic,

increasing

the

load

may be recommended to improve the ADC linearity.

impedance improves distortion directly. Remember

A high-speed, high open-loop gain amplifier such as

that the total load includes the feedback network—in

the THS6204 can be very susceptible to decreased

the noninverting configuration (see Figure 81), this is

stability and closed-loop response peaking when a

the sum of RF + RG, whereas in the inverting

capacitive load is placed directly on the output pin.

configuration

just

RF. Also, providing an

When the amplifier open-loop output resistance is

additional

supply

decoupling

capacitor

(0.01

µF)

considered,

this

capacitive

load

introduces

between the supply pins (for bipolar operation)

additional pole in the signal path that can decrease

improves the second-order distortion slightly (3dB to

the phase margin. Several external solutions to this

6dB).

problem have been suggested.

In most op amps, increasing the output voltage swing

When the primary considerations are frequency

increases harmonic distortion directly. The Typical

response flatness, pulse response fidelity, and/or

Characteristics show the second harmonic increasing

distortion, the simplest and most effective solution is

at a little less than the expected 2x rate whereas the

to isolate the capacitive load from the feedback loop

third harmonic increases at a little less than the

by inserting a series isolation resistor between the

expected 3x rate. Where the test power doubles, the

amplifier output and the capacitive load. This does

difference between it and the second harmonic

not eliminate the pole from the loop response, but

decreases less than the expected 6dB, whereas the

rather shifts it and adds a zero at a higher frequency.

difference

between

and

the

third

harmonic

The additional zero acts to cancel the phase lag from

decreases by less than the expected 12dB. This also

the capacitive load pole, thus increasing the phase

shows up in the two-tone, third-order intermodulation

margin

and

improving

stability.

The

Typical

spurious (IM3) response curves. The third-order

Characteristics

show

the

recommended

RS vs

spurious levels are extremely low at low-output power

Capacitive

Load

and

the

resulting

frequency

levels. The output stage continues to hold them low

response at the load. Parasitic capacitive loads

even as the fundamental power reaches very high

greater

than

2pF

can

begin

degrade

the

levels. As the Typical Characteristics show, the

performance of the THS6204. Long printed-circuit

spurious intermodulation powers do not increase as

board

(PCB)

traces,

unmatched

cables,

and

predicted by a traditional intercept model. As the

fundamental power level increases, the dynamic

range does not decrease significantly.

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