SN8A1702AX datasheet(97/145 Pages) SONIX

97 / 145 page

SN8P1700

8-bit micro-controller build-in 12-bit ADC

SONiX TECHNOLOGY CO., LTD

Page 97

Revision 1.94

TC1 INTERRUPT OPERATION

When the TC1C counter occurs overflow, the TC1IRQ will be set to “1” however the TC1IEN is enable or disable. If the

TC1IEN = 1, the trigger event will make the TC1IRQ to be “1” and the system enter interrupt vector. If the TC1IEN = 0,

the trigger event will make the TC1IRQ to be “1” but the system will not enter interrupt vector. Users need to care for

the operation under multi-interrupt situation.

Example: TC1 interrupt request setup.

B0BCLR

FTC1IEN

; Disable TC1 interrupt service

B0BCLR

FT C1ENB

; Disable TC1 timer

MOV

A, #20H

;

B0MOV

TC1M, A

; Set TC1 clock = Fcpu / 64

MOV

A, #74H

; Set TC1C initial value = 74H

B0MOV

TC1C, A

; Set TC1 interval = 10 ms

B0BSET

FTC1IEN

; Enable TC1 interrupt service

B0BCLR

FTC1IRQ

; Clear TC1 interrupt request flag

B0BSET

FTC1ENB

; Enable TC1 timer

B0BSET

FGIE

; Enable GIE

Example: TC1 interrupt service routine.

ORG

; Interrupt vector

JMP

INT_SERVICE

INT_SERVICE:

B0XCH

A, ACCBUF

; B0XCH doesn

’ t change C, Z flag

PUSH

; Push

B0BTS1

FTC1IRQ

; Check TC1IRQ

JMP

EXIT_INT

; TC1IRQ = 0, exit interrupt vector

B0BCLR

FTC1IRQ

; Reset TC1IRQ

MOV

A, #74H

B0MOV

TC1C, A

; Reset TC1C.

; TC1 interrupt service routine

EXIT_INT:

POP

; Pop

B0XCH

A, ACCBUF

; Restore ACC value.

RETI

; Exit interrupt vector

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