SN8A1702AX datasheet(15/145 Pages) SONIX

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SN8P1700

8-bit micro-controller build-in 12-bit ADC

SONiX TECHNOLOGY CO., LTD

Page 15

Revision 1.94

SN8P1707/SN8P1708 FEATURES

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Memory configuration

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Seven interrupt sources

OTP ROM size: 4K * 16 bits.

Four internal interrupts: T0, TC0, TC1, SIO.

RAM size: 256 * 8 bits (bank 0 and bank 1).

Three external interrupts: INT0, INT1, INT2.

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I/O pin configuration (Total 33 pins)

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An 8-channel ADC with 8-bit/12-bit resolution.

Input only: P0

Bi-directional: P1, P2, P4, P5

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One channel DAC with 7-bit resolution.

Wakeup: P0, P1

Pull-up resisters: P0, P1, P2, P4, P5

External interrupt: P0

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SIO function.

P4 pins shared with ADC inputs.

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Two channel PWM output. (PWM0, PWM1)

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Two channel Buzzer output. (BZ0, BZ1)

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An 8-bit basic timer. (T0).

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Two 8-bit timer counters. (TC0, TC1).

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Dual clock system offers three operating modes

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On chip watchdog timer.

External high clock: RC type up to 10 MHz

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Eight levels stack buffer.

External high clock: Crystal type up to 16 MHz

Internal low clock: RC type 16KHz(3V), 32KHz(5V)

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60 powerful instructions

Normal mode: Both high and low clock active

Four clocks per instruction cycle

Slow mode: Low clock only

All of instructions are one word length.

Sleep mode: Both high and low clock stop

Most of instructions are one cycle only.

All ROM area lookup table function (MOVC)

Support hardware multiplier (MUL).

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Package (Chip form support)

QPF 44 pins (SN8P1707)

SSOP 48 pins (SN8P1708)

PDIP 48 pins (SN8P1708)

Notice:

Declare “CHIP SN8P1707” for SN8P1707 in assembler.

Declare “CHIP SN8P1708” for SN8P1708 in assembler.

Use @SET_PUR macro to control pull-up resister. Refer I/O chapter for detailed information

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