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TLC320AD56 Datasheet(PDF) 24 Page - Texas Instruments |
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TLC320AD56 Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 42 page  3–4 DOUT DOUT DIN DAC Data In ADC Data Out DAC Data In All Bits 0 Secondary Update 16 SCLKs 64 FCLKs 16 SCLKs 16 SCLKs FS FC (Secondary Read) (Secondary Read or Write) Communication Frame 1 (CF1) (CF2) No Secondary Request ADC Data Out ADC Data Out ADC Data Out (Secondary Write) Primary Secondary Primary 64 FCLKs Register Data 8 SCLKs 32 FCLKs Figure 3–3. Hardware FC Secondary Request (Phone Mode Disabled) In Figure 3–4, FC hardware terminal 15 is left in its unasserted state (0). FC is asserted through software by embedding an asserted high level (1) in the LSB of the 16-bit primary word. This is possible when not in 16-bit mode (Control 1 register, bit 2 = 0) because the user is using only 15 bits of DAC information. |
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