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CXD3003 Datasheet(PDF) 51 Page - Sony Corporation |
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CXD3003 Datasheet(HTML) 51 Page - Sony Corporation |
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51 / 137 page  – 51 – CXD3003R Command bit VP0 to 7 = F0 (H) : VP0 to 7 = E0 (H) : VP0 to 7 = C0 (H) : VP0 to 7 = A0 (H) : VP0 to 7 = 80 (H) : VP0 to 7 = 60 (H) : VP0 to 7 = 40 (H) VP0 to 7 = 20 (H) VP0 to 7 = 00 (H) Playback at 1/2 (1, 2) × speed to Playback at 1 (2, 4) × speed to Playback at 2 (4, 8) × speed to Playback at 3 (6, 12) × speed to Playback at (8, 16) × speed to Playback at (10, 20) × speed to Playback at (12, 24) × speed Playback at (14, –) × speed Playback at (16, –) × speed Description Notes) 1. Values when crystal is 16.9344MHz and XTSL is low or when crystal is 33.8688MHz and XTLS is high. 2. Regarding the values in parentheses, the former ones are for when DSPB = 1 and VPCTL0, 1 = 0, and the latter ones are for when DSPB = 1, VPCTL0 = 1 and VPCTL1 = 0. |
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