L99DZ70XP datasheet(25/47 Pages) STMICROELECTRONICS

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L99DZ70XP

Application information

Doc ID 15162 Rev 3

25/47

3.5

Overvoltage and undervoltage detection at VS

If the power supply voltage VS rises above the overvoltage threshold VSOV OFF (typical

21 V), the outputs OUT1 to OUT11, ECDR and ECV are switched to high impedance state

to protect the load. When the voltage VS drops below the undervoltage threshold VSUV OFF

(UV-switch-OFF voltage), the output stages are switched to high impedance to avoid the

operation of the power devices without sufficient gate driving voltage (increased power

dissipation). If the supply voltage VS recovers (control register 3: bit 4=0) to normal

operating voltage then the outputs stages return to the programmed state. If the

undervoltage/overvoltage recovery disable bit is set (control register 3: bit 4=1), the

automatic turn-on of the drivers is deactivated.

The microcontroller needs to clear the status bits to reactivate the drivers. It is

recommended to set bit1 control register 3 to avoid a possible high current oscillation in

case of a shorted output to GND and low battery voltage.

3.6

Overvoltage and undervoltage detection at VCC

In case of power-on (VCC increases from undervoltage to VPOR OFF = 2.9 V) the circuit is

initialized by an internally generated power-on-reset (POR). If the voltage VCC decreases

below the minimum threshold (VPOR ON = 2.0 V), the outputs are switched to tristate (high

impedance) and the status registers are cleared.

3.7

Temperature warning and thermal shutdown

If the junction temperature rises above Tj TW, a temperature warning flag is set after at least

32 µs and it can be read via the SPI. If the junction temperature increases above the second

threshold TjSD, the thermal shutdown bit is set and the power DMOS transistors of all output

stages are switched off to protect the device after at least 32 µs.

The temperature warning and thermal shutdown flags are latched and the bits must be

cleared by the microcontroller. This is possible only if the temperature has decreased below

trigger temperature. If the thermal shutdown bit has been cleared the output stages are

reactivated.

3.8

Inductive loads

Each half bridge is built by internally connected highside and lowside power DMOS

transistors. Due to the built-in reverse diodes of the output transistors, inductive loads can

be driven at the outputs OUT1 to OUT6 without external free-wheeling diodes. The highside

drivers OUT7 to OUT11 are intended to drive resistive loads. Therefore only a limited energy

(E<1mJ) can be dissipated by the internal ESD-diodes in freewheeling condition. For

inductive loads (L>100µH) an external free-wheeling diode connected between GND and

the corresponding output is required.

The low side driver at ECV does not have a freewheel diode built into the device.

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