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L99PM62XP Datasheet(PDF) 69 Page - STMicroelectronics |
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L99PM62XP Datasheet(HTML) 69 Page - STMicroelectronics |
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69 / 98 page ![]() L99PM62XP ST SPI Doc ID 16363 Rev 3 69/98 6.1.5 Address mapping The RAM memory area consists of 16 bit registers. For the device information (ROM memory area) the eight most significant bits of the memory cell are used. The remaining 8 are zero. All unused RAM and ROM addresses is read as ‘0’. Note: 1 The register definition for RAM address 00H is unused. A register value of all 0 must cause the device to enter a fail-safe state (interpreted as ‘SDI stuck to GND’ failure). 2 ROM address 3FH is unused. An attempt to access this address must be recognized as a communication error (‘SDI stuck to VCC’ failure) and must cause the device to enter a fail- safe state. 6.1.6 Write operation The write operation starts with a command byte followed by 2 data bytes. The number of data bytes is specified in the <SPI-frame-ID>. Write command format Table 45. Address mapping RAM adress Description Access ROM adress Description Access 3FH <Configuration> R/W 3FH Reserved N/A 13H Status register 3 R 3EH <SPI frame ID> R 12H Status register 2 R 11H Status register 1 R … Unused N/A 06H Control register 6 R/W 03H <product code 2> N/A 05H Control register 5 R/W 04H Control register 4 R/W 02H <product code 1> R 03H Control register 3 R/W 02H Control register 2 R/W 01H <silicon version> R 01H Control register 1 R/W 00H Reserved R/W 00H <ID Header> R Table 46. Write command format: command byte MSB LSB Op Code Address 0 0 A5 A4 A3 A2 A1 A0 |
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