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WM8215 Datasheet(PDF) 6 Page - Wolfson Microelectronics plc |
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WM8215 Datasheet(HTML) 6 Page - Wolfson Microelectronics plc |
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6 / 31 page ![]() WM8215 Production Data w PD, Rev 4.3, September 2012 6 ELECTRICAL CHARACTERISTICS Test Conditions AVDD = DVDD1 = DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25C, MCLK = 60MHz unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Overall System Specification (including 10-bit ADC, PGA, Offset and CDS functions) Conversion rate 60 MSPS Full-scale input voltage range (see Note 1) LOWREFS=0, Max Gain LOWREFS=0, Min Gain 0.25 3.03 Vp-p Vp-p LOWREFS=1, Max Gain LOWREFS=1, Min Gain 0.15 1.82 Vp-p Vp-p Input signal limits (see Note 2) VIN AGND-0.3 AVDD+0.3 V Input capacitance 10 pF Input switching impedance 45 Full-scale transition error Gain = 0dB; PGA[8:0] = 14(hex) 20 mV Zero-scale transition error Gain = 0dB; PGA[8:0] = 14(hex) 20 mV Differential non-linearity DNL 0.75 LSB Integral non-linearity INL 2 LSB Channel to channel gain matching 1% % Output noise Min Gain Max Gain 0.2 2.15 LSB rms LSB rms References Upper reference voltage VRT LOWREFS=0 LOWREFS=1 1.95 2.05 1.85 2.25 V V Lower reference voltage VRB LOWREFS=0 LOWREFS=1 0.95 1.05 1.25 1.25 V V Input return bias voltage VRX 1.25 V Diff. reference voltage (VRT-VRB) VRTB LOWREFS=0 LOWREFS=1 0.95 0.57 1.0 0.6 1.10 0.68 V V Output resistance VRT, VRB, VRX 1 VRLC/Reset-Level Clamp (RLC) RLC switching impedance 45 VRLC short-circuit current 2 mA VRLC output resistance 3 VRLC Hi-Z leakage current VRLC = 0 to AVDD 1 A RLCDAC resolution 4 bits RLCDAC step size, RLCDACRNG = 0 VRLCSTEP 0.173 V/step RLCDAC step size, RLCDACRNG = 1 VRLCSTEP LOWREFS = 0 0.11 V/step LOWREFS = 1 0.10 RLCDAC output voltage at code 0(hex), RLCDACRNG = 0 VRLCBOT 0.4 V RLCDAC output voltage at code 0(hex), RLCDACRNG = 1 VRLCBOT LOWREFS = 0 0.4 V LOWREFS = 1 RLCDAC output voltage at code F(hex) RLCDACRNG, = 0 VRLCTOP 3.0 V RLCDAC output voltage at code F(hex), RLCDACRNG = 1 VRLCTOP LOWREFS = 0 2.05 1.85 V LOWREFS = 1 RLCDAC DNL -0.5 +0.5 LSB RLCDAC INL +/-0.5 LSB Notes: 1. Full-scale input voltage denotes the peak input signal amplitude that can be gained to match the ADC full-scale input range. |
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