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WM8311 Datasheet(PDF) 64 Page - Wolfson Microelectronics plc |
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WM8311 Datasheet(HTML) 64 Page - Wolfson Microelectronics plc |
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64 / 302 page ![]() WM8311 Pre-Production w PP, May 2012, Rev 3.1 64 ADDRESS BIT LABEL DEFAULT DESCRIPTION 0 = No action 1 = Verify Command Protected by user key 9 OTP_WRITE 0 Selects WRITE command for the selected OTP memory page(s). 0 = No action 1 = Write Command Protected by user key 8 OTP_READ 0 Selects READ command for the selected memory page(s). 0 = No action 1 = Read Command Protected by user key 7:6 OTP_READ_L VL [1:0] 00 Selects the Margin Level for READ or VERIFY OTP commands. 00 = Normal 01 = Reserved 10 = Margin 1 11 = Margin 2 Protected by user key 5 OTP_BULK 0 Selects the number of memory pages for ICE / OTP commands. 0 = Single Page 1 = All Pages 1:0 OTP_PAGE [1:0] 00 Selects the single memory page for ICE / OTP commands (when OTP_BULK=0). If OTP is selected (OTP_MEM = 1): 00 = Page 0 01 = Page 1 10 = Page 2 11 = Page 3 If ICE is selected (OTP_MEM = 0): 00 = Page 2 01 = Page 3 10 = Page 4 11 = Reserved Table 27 OTP Memory Control 14.5 OTP / ICE INTERRUPTS The OTP and ICE memories are associated with two Interrupt event flags. The OTP_CMD_END_EINT interrupt is set each time an OTP / ICE Command has completed or if OTP Auto-Program has completed. (See Section 14.4 for a definition of the OTP and ICE Commands. See Section 14.6.3 for details of the OTP Auto-Program function.) The OTP_ERR_EINT interrupt is set when an OTP / ICE Error has occurred. The errors detected include ICE Read Failure, OTP Verify Failure and attempted OTP Write to a page that has been ‘Finalised’. Each of these secondary interrupts triggers a primary OTP Memory Interrupt, OTP_INT (see Section 23). This can be masked by setting the mask bit(s) as described in Table 75. |
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