WM8352 datasheet(128/336 Pages) WOLFSON

128 / 336 page

WM8352

Production Data

PD, February 2011, Rev 4.4

128

DC-DC Converters 1, 3, 4 and 6 can also be controlled by the device HIBERNATE bit, or by

hardware input signals L_PWR1, L_PWR2 and L_PWR3. Several GPIO pins can be assigned as

L_PWR pins. Each converter can be assigned to one of these three signals, or else to the device

HIBERNATE bit. The signals are active high and each converter’s response to the selected signal is

programmable as defined in Table 73.

Note that, when a GPIO pin is configured as a Hibernate input pin, and this input is asserted, then all

DC-DC Converters will be placed in Hibernate mode.

In order to use GPIO pins as L_PWR pins, they must be configured by setting the respective

GPn_FN, and GPn_DIR bits to the appropriate value (see Section 20).

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R182 (B6h) for

DC-DC1

R188 (BCh) for

DC-DC3

R191 (BFh) for

DC-DC4

R197 (C5h) for

DC-DC6

14:12

DCn_HIB_M

ODE [2:0]

001

DC-DCn Hibernate behaviour:

000 = Use current settings (no change)

001 = Select voltage image settings

010 = Force standby mode

011 = Force standby mode and voltage

image settings

100 = Force LDO mode

101 = Force LDO mode and voltage

image settings

110 = Reserved

111 = Disable output

9:8

DCn_HIB_T

RIG [1:0]

DC-DCn Hibernate signal select

00 = HIBERNATE register bit

01 = L_PWR1

10 = L_PWR2

11 = L_PWR3

Note that Hibernate is also selected

when a GPIO Hibernate input is

asserted.

Note: n is either 1, 3, 4 or 6 and identifies the individual DC-DC converter

Table 73 Low-Power Mode Control for DC-DC Converters 1, 3, 4 and 6

WM8352 Datasheet(PDF) 128 Page - Wolfson Microelectronics plc

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