AD5122A/AD5142A

Data Sheet

Rev. A | Page 12 of 32

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

NOTES

1. INTERNALLY CONNECT THE

AD5122A/

AD5142A

TOP VIEW

(Not to Scale)

PIN 1

INDICATOR

1

GND

2

A1

3

W1

4

B1

9

Figure 4. 16-Lead LFCSP Pin Configuration

Table 7. 16-Lead LFCSP Pin Function Descriptions

Pin No.

Mnemonic

Description

1

GND

Ground Pin, Logic Ground Reference.

2

A1

3

W1

4

B1

5

Negative Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors.

6

A2

7

W2

8

B2

9

Positive Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors.

10

11

SCL

Serial Clock Line.

12

SDA

Serial Data Input/Output.

13

ADDR1

Programmable Address (ADDR1) for Multiple Package Decoding.

14

ADDR0

Programmable Address (ADDR0) for Multiple Package Decoding.

15

INDEP

Linear Gain Setting Mode at Power-Up. Each string resistor is loaded from its associated memory location.

If INDEP is enabled, it cannot be disabled by the software.

16

RESET

Hardware Reset Pin. Refresh the RDAC registers from EEPROM. RESET is activated at logic low.

EPAD