AT45DB081D_13 datasheet(2/53 Pages) AD

2 / 53 page

3596O–DFLASH–1/2013

AT45DB081D

address lines and a parallel interface, the Adesto™ DataFlash® uses a RapidS serial interface to

sequentially access its data. The simple sequential access dramatically reduces active pin

count, facilitates hardware layout, increases system reliability, minimizes switching noise, and

reduces package size. The device is optimized for use in many commercial and industrial appli-

cations where high-density, low-pin count, low-voltage and low-power are essential.

To allow for simple in-system reprogrammability, the AT45DB081D does not require high input

voltages for programming. The device operates from a single power supply, 2.5V to 3.6V or 2.7V

to 3.6V, for both the program and read operations. The AT45DB081D is enabled through the

chip select pin (CS) and accessed via a three-wire interface consisting of the Serial Input (SI),

Serial Output (SO), and the Serial Clock (SCK).

All programming and erase cycles are self-timed.

2. Pin Configurations and Pinouts

Note:

1. The metal pad on the bottom of the MLF package is floating. This pad can be a “No Connect”

or connected to GND

Figure 2-1.

MLF (VDFN) Top View

Figure 2-2.

SOIC Top View

SCK

RESET

GND

VCC

SCK

RESET

GND

VCC

AT45DB081D Datasheet(PDF) 2 Page - Analog Devices