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CT2579 Datasheet(PDF) 10 Page - Aeroflex Circuit Technology

Part # CT2579
Description  APPLICATION NOTE 108
PDF  41 Pages
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Manufacturer  AEROFLEX [Aeroflex Circuit Technology]
Direct Link  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology

CT2579 Datasheet(HTML) 10 Page - Aeroflex Circuit Technology

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10
APPLICATION NOTE #108
Released 9/98
SIGNALS THAT INDICATE CHECKSUM FAILURE
For 1760 applications, the STATUS line indicates if a message has failed checksum. The
STATUS line will toggle up or down for each received data word as it is calculating the
checksum and is sampled on the falling edge of NCMDSTRB. The STATUS line can be tied
to any of the Status Word Bit inputs to set those bits in the event of a checksum fail. STATUS
is an open output line that will set the selected Status Word Bits for the Status Word
response in the current message. This is one of the great features for this product. The
subsystem does not have to verify the checksum in software to detect the error. The SmaRT
unit automatically does this in hardware and the unit is able to flag the error and set the a
Status Word Bit on the CURRENT Status Word response . This minimizes processor
overhead and reduces response time in notifying the Bus Controller that an error has
occurred.
For 1760 applications, the NVALCHK signal also indicates a valid checksum for the Receive
Command message. NVALCHK is a latched version of the STATUS signal and is updated
only on Receive Commands. It is valid on the falling edge of NCMDSTRB of a Receive
Command and remains stable until the next Receive Command message. A Transmit
Command message will not alter this signal because a Transmit Command does not require
an incoming checksum validation.
BLOCK TRANSFER LOGIC
The Block Transfer Logic (BTL) may be enabled for both Remote Terminal and Bus
Controller.
The BTL consists of a 32 word memory buffering the subsystem to the main RAM thus
guaranteeing data consistency for both transmit and receive transfers.
All reads and writes to the BTL are identical to read / write to the main RAM. The address
locations are the same. The only difference is that the BTL circuitry will intercept those read
T0-15
NEMPTY
NVALCHK
CMD WD
STATUS
VALID
NCMDSTRB
Latched Until Next Receive Command
8.5 µSec



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