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LCMXO2-640ZE-2TG100C Datasheet(PDF) 78 Page - Lattice Semiconductor |
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LCMXO2-640ZE-2TG100C Datasheet(HTML) 78 Page - Lattice Semiconductor |
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78 / 106 page ![]() 4-2 Pinout Information MachXO2 Family Data Sheet DONE I/O Open Drain pin. Indicates that the configuration sequence is complete, and the start-up sequence is in progress. MCLK/CCLK I/O Input Configuration Clock for configuring an FPGA in Slave SPI mode. Output Configuration Clock for configuring an FPGA in SPI and SPIm configuration modes. SN I Slave SPI active low chip select input. CSSPIN I/O Master SPI active low chip select output. SI/SISPI I/O Slave SPI serial data input and master SPI serial data output. SO/SPISO I/O Slave SPI serial data output and master SPI serial data input. SCL I/O Slave I 2C clock input and master I2C clock output. SDA I/O Slave I 2C data input and master I2C data output. Signal Name I/O Descriptions General Purpose |
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