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PIC24F32KA302-I/ML Datasheet(PDF) 141 Page - Microchip Technology |
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PIC24F32KA302-I/ML Datasheet(HTML) 141 Page - Microchip Technology |
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141 / 364 page ![]() 2011-2013 Microchip Technology Inc. DS39995D-page 141 PIC24FV32KA304 FAMILY 13.0 TIMER2/3 AND TIMER4/5 The Timer2/3 and Timer4/5 modules are 32-bit timers, which can also be configured as four independent,16-bit timers with selectable operating modes. As a 32-bit timer, Timer2/3 or Timer4/5 operate in three modes: • Two Independent 16-Bit Timers (Timer2 and Timer3) with all 16-Bit Operating modes (except Asynchronous Counter mode) • Single 32-Bit Timer • Single 32-Bit Synchronous Counter They also support these features: • Timer Gate Operation • Selectable Prescaler Settings • Timer Operation during Idle mode • Interrupt on a 32-Bit Period Register Match • A/D Event Trigger Individually, all four of the 16-bit timers can function as synchronous timers or counters. They also offer the features listed above, except for the A/D event trigger (this is implemented only with Timer3). The operating modes and enabled features are determined by setting the appropriate bit(s) in the T2CON, T3CON, T4CON and T5CON registers. The T2CON,T3CON, T4CON and T5CON registers are provided in generic form in Register 13-1 and Register 13-2, respectively. For 32-bit timer/counter operation, Timer2/Timer4 is the least significant word (lsw) and Timer3 /Timer5 is the most significant word (msw) of the 32-bit timer. To configure Timer2/3 or Timer4/5 for 32-bit operation: 1. Set the T32 bit (T2CON<3> or T4CON<3> = 1). 2. Select the prescaler ratio for Timer2 or Timer4 using the TCKPS<1:0> bits. 3. Set the Clock and Gating modes using the TCS and TGATE bits. 4. Load the timer period value. PR3 (or PR5) will contain the most significant word of the value, while PR2 (or PR4) contains the least significant word. 5. If interrupts are required, set the Timerx Interrupt Enable bit, TxIE. Use the Timerx Interrupt Priority bits, TxIP<2:0>, to set the interrupt priority. 6. Set the TON bit (TxCON<15> = 1). The timer value, at any point, is stored in the register pair, TMR3:TMR2 (or TMR5:TMR4). TMR3 (TMR5) always contains the most significant word of the count, while TMR2 (TMR4) contains the least significant word. To configure any of the timers for individual 16-bit operation: 1. Clear the T32 bit corresponding to that timer (T2CON<3> for Timer2 and Timer3 or T4CON<3> for Timer4 and Timer5). 2. Select the timer prescaler ratio using the TCKPS<1:0> bits. 3. Set the Clock and Gating modes using the TCS and TGATE bits. 4. Load the timer period value into the PRx register. 5. If interrupts are required, set the Timerx Interrupt Enable bit, TxIE; use the Timerx Interrupt Priority bits, TxIP<2:0>, to set the interrupt priority. 6. Set the TON bit (TxCON<15> = 1). Note: This data sheet summarizes the features of this group of PIC24F devices. It is not intended to be a comprehensive reference source. For more information on Timers, refer to the “PIC24F Family Reference Manual”, Section 14. “Timers” (DS39704). Note: For 32-bit operation, T3CON or T5CON control bits are ignored. Only T2CON or T4CON control bits are used for setup and control. Timer2 or Timer4 clock and gate inputs are utilized for the 32-bit timer modules, but an interrupt is generated with the Timer3 or Timer5 interrupt flags. |
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