PIC24F32KA302-ISLASHML datasheet(138/364 Pages) MICROCHIP

138 / 364 page

PIC24FV32KA304 FAMILY

DS39995D-page 138

 2011-2013 Microchip Technology Inc.

11.2.2

I/O PORT WRITE/READ TIMING

One instruction cycle is required between a port

direction change or port write operation and a read

operation of the same port. Typically, this instruction

would be a NOP.

11.3

Input Change Notification (ICN)

The Input Change Notification function of the I/O ports

allows the PIC24FV32KA304 family of devices to

generate interrupt requests to the processor in

response to a Change-of-State (COS) on selected

input pins. This feature is capable of detecting input

Change-of-States, even in Sleep mode, when the

clocks are disabled. Depending on the device pin

count, there are up to 23 external signals (CN0 through

CN22) that may be selected (enabled) for generating

an interrupt request on a Change-of-State.

There are six control registers associated with the ICN

module. The CNEN1 and CNEN2 registers contain the

interrupt enable control bits for each of the CN input

pins. Setting any of these bits enables a CN interrupt

for the corresponding pins.

Each CN pin also has a weak pull-up/pull-down

connected to it. The pull-ups act as a current source

that is connected to the pin. The pull-downs act as a

current sink to eliminate the need for external resistors

when push button or keypad devices are connected.

On any pin, only the pull-up resistor or the pull-down

resistor should be enabled, but not both of them. If the

push button or the keypad is connected to VDD, enable

the pull-down, or if they are connected to VSS, enable

the pull-up resistors. The pull-ups are enabled

separately, using the CNPU1 and CNPU2 registers,

which contain the control bits for each of the CN pins.

Setting any of the control bits enables the weak

pull-ups for the corresponding pins. The pull-downs are

enabled separately, using the CNPD1 and CNPD2 reg-

isters, which contain the control bits for each of the CN

pins. Setting any of the control bits enables the weak

pull-downs for the corresponding pins.

When the internal pull-up is selected, the pin uses VDD

as the pull-up source voltage. When the internal

pull-down is selected, the pins are pulled down to VSS

by an internal resistor. Make sure that there is no

external pull-up source/pull-down sink when the

internal pull-ups/pull-downs are enabled.

EXAMPLE 11-1:

PORT WRITE/READ EXAMPLE

Note:

Pull-ups and pull-downs on Change Notifi-

cation pins should always be disabled

whenever the port pin is configured as a

digital output.

MOV

0xFF00, W0;

//Configure PORTB<15:8> as inputs and PORTB<7:0> as outputs

MOV

W0, TRISB;

NOP;

//Delay 1 cycle

BTSS

PORTB, #13;

//Next Instruction

Equivalent ‘C’ Code

TRISB = 0xFF00;

//Configure PORTB<15:8> as inputs and PORTB<7:0> as outputs

NOP();

//Delay 1 cycle

if(PORTBbits.RB13 == 1)

// execute following code if PORTB pin 13 is set.

{

}

PIC24F32KA302-I/ML Datasheet(PDF) 138 Page - Microchip Technology

PIC24F32KA302-I/ML Datasheet(HTML) 138 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL