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PIC24F32KA302-I/ML Datasheet(PDF) 136 Page - Microchip Technology |
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PIC24F32KA302-I/ML Datasheet(HTML) 136 Page - Microchip Technology |
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136 / 364 page ![]() PIC24FV32KA304 FAMILY DS39995D-page 136 2011-2013 Microchip Technology Inc. 11.1.1 OPEN-DRAIN CONFIGURATION In addition to the PORT, LAT and TRIS registers for data control, each port pin can also be individually configured for either digital or open-drain output. This is controlled by the Open-Drain Control register, ODCx, associated with each port. Setting any of the bits configures the corresponding pin to act as an open-drain output. The maximum open-drain voltage allowed is the same as the maximum VIH specification. 11.2 Configuring Analog Port Pins The use of the ANS and TRIS registers control the operation of the A/D port pins. The port pins that are desired as analog inputs must have their correspond- ing TRISx bit set (input). If the TRISx bit is cleared (output), the digital output level (VOH or VOL) will be converted. When reading the PORT register, all pins configured as analog input channels will read as cleared (a low level). Analog levels on any pin that is defined as a digital input (including the ANx pins) may cause the input buffer to consume current that exceeds the device specifications. 11.2.1 ANALOG SELECTION REGISTERS I/O pins with shared analog functionality, such as A/D inputs and comparator inputs, must have their digital inputs shut off when analog functionality is used. Note that analog functionality includes an analog voltage being applied to the pin externally. To allow for analog control, the ANSx registers are provided. There is one ANS register for each port (ANSA, ANSB and ANSC). Within each ANSx register, there is a bit for each pin that shares analog functionality with the digital I/O functionality. If a particular pin does not have an analog function, that bit is unimplemented. See Register 11-1 to Register 11-3 for implementation. REGISTER 11-1: ANSA: ANALOG SELECTION (PORTA) U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 — — — — ANSA3 ANSA2 ANSA1 ANSA0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-4 Unimplemented: Read as ‘0’ bit 3-0 ANSA<3:0>: Analog Select Control bits 1 = Digital input buffer is not active (use for analog input) 0 = Digital input buffer is active |
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