PIC24F32KA302-ISLASHML datasheet(133/364 Pages) MICROCHIP

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DS39995D-page 133

PIC24FV32KA304 FAMILY

10.4

Voltage Regulator-Based

Power-Saving Features

The PIC24FV32KA304 series devices have a Voltage

Regulator that has the ability to alter functionality to

provide power savings. The on-board regulator is made

up of two basic modules: the Voltage Regulator

(VREG) and the Retention Regulator (RETREG). With

the combination of VREG and RETREG, the following

power modes are available:

10.4.1

RUN MODE

In Run mode, the main VREG is providing a regulated

voltage with enough current to supply a device running

at full speed, and the device is not in Sleep or Deep

Sleep Mode. The Retention Regulator may or may not

be running, but is unused.

10.4.2

SLEEP (STANDBY) MODE

In Sleep mode, the device is in Sleep and the main

VREG is providing a regulated voltage at a reduced

(standby) supply current. This mode provides for

limited functionality due to the reduced supply current.

It requires a longer time to wake-up from Sleep.

10.4.3

RETENTION SLEEP MODE

In Retention Sleep mode, the device is in Sleep and all

regulated voltage is provided solely by the Retention

Regulator. Consequently, this mode has lower power

consumption than regular Sleep mode, but is also

limited in terms of how much functionality can be

enabled. Retention Sleep wake-up time is longer than

Sleep mode due to the extra time required to raise the

VCORE supply rail back to normal regulated levels.

10.4.4

DEEP SLEEP MODE

In Deep Sleep mode, both the main Voltage Regulator

and Retention Regulator are shut down, providing the

lowest possible device power consumption. However,

this mode provides no retention or functionality of the

device and has the longest wake-up time.

TABLE 10-1:

VOLTAGE REGULATION CONFIGURATION SETTINGS FOR PIC24FV32KA304

FAMILY DEVICES

Note:

PIC24F32KA30X family devices do not

use an On-Chip Voltage Regulator, so

they do not support Retention Sleep

mode.

RETCGF Bit

(FPOR<2>)

RETEN Bit

(RCON<12>

PMSLP Bit

(RCON<8>)

Power Mode

During Sleep

Description

Sleep

VREG mode (normal) is unchanged during Sleep.

RETREG is unused.

Sleep

(Standby)

VREG goes to Low-Power Standby mode during

Sleep. RETREG is unused.

Retention

Sleep

VREG is off during Sleep. RETREG is enabled and

provides Sleep voltage regulation.

Sleep

VREG mode (normal) is unchanged during Sleep.

RETREG is disabled at all times.

Sleep

(Standby)

VREG goes to Low-Power Standby mode during

Sleep. RETREG is disabled at all times

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