PIC24F32KA302-ISLASHML datasheet(159/364 Pages) MICROCHIP

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 2011-2013 Microchip Technology Inc.

DS39995D-page 159

PIC24FV32KA304 FAMILY

OCxCON2: OUTPUT COMPARE x CONTROL REGISTER 2

R/W-0

U-0

R/W-0

FLTMD

FLTOUT

FLTTRIEN

OCINV

—

DCB1(3)

DCB0(3)

OC32

bit 15

bit 8

R/W-0

R/W-0, HS

R/W-0

R/W-1

R/W-0

OCTRIG

TRIGSTAT

OCTRIS

SYNCSEL4

SYNCSEL3

SYNCSEL2

SYNCSEL1

SYNCSEL0

bit 7

bit 0

Legend:

HS = Hardware Settable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

FLTMD: Fault Mode Select bit

1 = Fault mode is maintained until the Fault source is removed and the corresponding OCFLTx bit is

cleared in software

0 = Fault mode is maintained until the Fault source is removed and a new PWM period starts

bit 14

FLTOUT: Fault Out bit

1 = PWM output is driven high on a Fault

0 = PWM output is driven low on a Fault

bit 13

FLTTRIEN: Fault Output State Select bit

1 = Pin is forced to an output on a Fault condition

0 = Pin I/O condition is unaffected by a Fault

bit 12

OCINV: Output Compare x Invert bit

1 = OCx output is inverted

0 = OCx output is not inverted

bit 11

Unimplemented: Read as ‘0’

bit 10-9

DCB<1:0>: Output Compare x Pulse-Width Least Significant bits(3)

11 = Delays OCx falling edge by 3/4 of the instruction cycle

10 = Delays OCx falling edge by 1/2 of the instruction cycle

01 = Delays OCx falling edge by 1/4 of the instruction cycle

00 = OCx falling edge occurs at the start of the instruction cycle

bit 8

OC32: Cascade Two Output Compare Modules Enable bit (32-bit operation)

1 = Cascade module operation is enabled

0 = Cascade module operation is disabled

bit 7

OCTRIG: Output Compare x Sync/Trigger Select bit

1 = Triggers OCx from source designated by the SYNCSELx bits

0 = Synchronizes OCx with source designated by the SYNCSELx bits

bit 6

TRIGSTAT: Timer Trigger Status bit

1 = Timer source has been triggered and is running

0 = Timer source has not been triggered and is being held clear

bit 5

OCTRIS: Output Compare x Output Pin Direction Select bit

1 = OCx pin is tri-stated

0 = Output Compare x peripheral is connected to the OCx pin

Note 1:

Do not use an output compare module as its own trigger source, either by selecting this mode or another

equivalent SYNCSELx setting.

Use these inputs as trigger sources only and never as Sync sources.

These bits affect the rising edge when OCINV = 1. The bits have no effect when the OCMx bits

(OCxCON1<2:0>) = 001.

PIC24F32KA302-I/ML Datasheet(PDF) 159 Page - Microchip Technology

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