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LM4308 Datasheet(PDF) 12 Page - Texas Instruments |
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LM4308 Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 33 page ![]() DATA[17:0] DATA[17:0] T1 T2 AD WR* CS1* or CS2* other CS*=H T3 T4 T5 AD WR* RD* MASTER INPUT SLAVE OUTPUT T7 T6 T8 RD* 14 DC DC DD CS1* or CS2* other CS* = H T9 LM4308 SNLS225C – AUGUST 2007 – REVISED MAY 2013 www.ti.com Figure 9. WRITE Waveforms Table 5. i80 CPU WRITE Interface Parameters No. Parameter Min Typ Max Units T1 MasterIN Data and address Setup Time before Low-High Edge 5 ns T2 MasterIN Data and address Hold after Low-High Edge 5 ns T3 MasterIN Bus Cycle Rate 16 DC Cycles T4 Master Master Latency 7 DC Cycles T5 Slave Slave Latency 15 DC Cycles T6 SlaveOUT Data Valid before WR* High-Low 1 DC Cycles T7 SlaveOUT WR* Low Pulse Width 12 DC Cycles T8 SlaveOUT Data Valid before WR* Low-High, 13 DC Cycles T9 SlaveOUT Data Valid after WR* Low-High 1 DC Cycles 12 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LM4308 |
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