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DAC6573IPW Datasheet(PDF) 24 Page - Texas Instruments

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Part # DAC6573IPW
Description  This document contains the following chapters
PDF  26 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DAC6573IPW Datasheet(HTML) 24 Page - Texas Instruments

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Jumper Setting
3-6
3.5
Jumper Setting
Table 3 - 6 shows the function of each specific jumper setting of the EVM.
Table 3 - 6. Jumper Setting Function
Reference
Jumper
Setting
Function
W1
1
3
5 - V analog supply is selected for AVDD.
W1
1
3
+3.3 - V analog supply is selected for AVDD.
W2
1
3
Routes VOUTA to J4-2
W2
1
3
Routes VOUTA to J4-10
W3
Disconnects VREFH to the inverting input of output op amp U2.
W3
Connects VREFH to the inverting input of output op amp U2.
W4
1
3
Routes the adjustable, buffered, onboard 5-V reference to the VREFH input of the
DACx573.
W4
1
3
Routes the user supplied reference from TP1 or J4 - 20 to the VREFH input of the
DACx573.
W5
1
3
Negative supply rail of the output op amp U2 is powered by VSS for bipolar operation.
W5
1
3
Negative supply rail of the output op amp U2 is tied to AGND for unipolar operation.
W6
1
3
VREFL is tied to AGND.
W6
1
3
Routes the user-supplied negative reference from TP2 or J4 - 18 to the VREFL input of
the DACx573. This voltage must be within the range of 0V to VREFH.
W7
A0 is set high through pullup-resistor R4. A0 can be driven by GPIO5.
W7
A0 is set low.
W8
A1 is set high through pullup-resistor R3. A1 can be driven by GPIO4.
W8
A1 is set low.
W9
A3 is set high through pullup-resistor R2. A3 can be driven by GPIO1.
W9
LDAC pin is set low and DAC update is accomplished via software.
W10
A2 is set high through pullup-resistor R1. A2 can be driven by GPIO3.
W10
A2 pin is set low.
W11
1
3
Routes VOUTB to J4-4
W11
1
3
Routes VOUTB to J4-12



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