EP3SL340 datasheet(32/341 Pages) ALTERA

32 / 341 page

1–22

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics

Switching Characteristics

Stratix III Device Handbook, Volume 2

Altera Corporation

LVDS_E_1R -f

HSDR

(data rate)

SERDES factor

J = 4 to 10

(4)

—

311

(4)

—

200

(4)

—200

(4)

—

200

Mbps

x Jitter (5)

Total Jitter for

Data Rate,

600 Mbps –

1.6 Gbps

—

160

—

160

—

160

—

160

Total Jitter for

Data Rate,

<600 Mbps

—

0.1

—

0.1

—

0.1

—

0.1

DUTY

X output duty

cycle for both

True and

Emulated

Differential I/O

tRISE & tFALL

True Differential

I/O Standards

—

160

—

200

—

200

—

200

RISE & tFALL

Emulated

Differential I/O

Standards with

Three External

Output Resistor

Network

—

310

—

310

—

350

—

350

RISE & tFALL

Emulated

Differential I/O

Standards with

One External

Output Resistor

Network

—

460

—

500

—

500

—

500

TCCS

True Differential

I/O Standards

—

100

—

100

—

100

—

100

TCCS

Emulated

Differential I/O

Standards

—

250

—

250

—

250

—

250

Receiver

HSDRDPA (data rate)

SERDES factor

J = 3 to 10

150

—

1600

150

—

1250

150

—

1250

150

—

1250

Mbps

HSDR (data rate)

SERDES factor

J = 3 to 10

(4)

—

(6)

(4)

—

(6)

(4)

—

(6)

(4)

—

(6)

Mbps

SERDES factor

J = 2, Uses DDR

Registers

(4)

—

(6)

(4)

—

(6)

(4)

—

(6)

(4)

—

(6)

Mbps

SERDES factor

J = 1, Uses an

SDR Register

(4)

—

(6)

(4)

—

(6)

(4)

—

(6)

(4)

—

(6)

Mbps

DPA

DPA run length

—

10000

—

10000

—

10000

—

10000

Soft CDR mode

Soft-CDR PPM

tolerance

—

300

—

300

—

300

—

300

± PPM

Table 1–25. True and Emulated LVDS Specifications for Stratix III Devices (Note 1), (2) (Part 2 of 3)

Symbol

Conditions

C3, I3

C4, I4

C4L, I4L

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