APL5327 datasheet(9/14 Pages) ANPEC

9 / 14 page

Rev. A.2 - Jun., 2011

APL5327

www.anpec.com.tw

Application Information

D = (TJ - TA) / θJA

where (T

J-TA) is the temperature difference between the

junction and ambient air.

JA is the thermal resistance

between Junction and ambient air. Assuming the

A=25

oC and maximum T

J=160

oC (typical thermal limit

threshold), the maximum power dissipation is calcu-

lated as below:

D(max)=(160-25)/240

= 0.56(W)

For normal operation, do not exceed the maximum junc-

tion temperature rating of T

J = 125

oC. The calculated power

dissipation should less than:

D =(125-25)/240

= 0.41(W)

The GND provides an electrical connection to the ground

and channels heat away. Connect the GND to the ground

by using a large pad or a ground plane.

Input Capacitor

The APL5327 requires proper input capacitors to supply

surge current during stepping load transients to prevent

the input rail from dropping. Because the parasitic induc-

tor from the voltage sources or other bulk capacitors to

the VIN limit the slew rate of the surge current, place the

Input capacitors near VIN as close as possible. Input ca-

pacitors should be larger than 1

µF and a minimum ce-

ramic capacitor of 1

µF is necessary.

Output Capacitor

The APL5327 needs a proper output capacitor to main-

tain circuit stability and to improve transient response over

temperature and current. In order to insure the circuit

stability, the proper output capacitor value should be larger

than 1

µF. With X5R and X7R dielectrics, 1µF is sufficient

at all operating temperatures. Large output capacitor value

can reduce noise and improve load-transient response

and PSRR, however, it also affects power on issue. Maxi-

mum output capacitance should be less than 100

µF.

Operation Region and Power Dissipation

The APL5327 maximum power dissipation depends on

the thermal resistance and temperature difference be-

tween the die junction and ambient air. The power dissi-

pation P

D across the device is:

Layout Consideration

Figure 1 illustrates the layout. Below is a checklist for

your layout:

1. Please place the input capacitors close to the VIN.

2. Ceramic capacitors for load must be placed near the

load as close as possible.

3. To place APL5327 and output capacitors near the load

is good for performance.

4. Large current paths, the bold lines in figure 2, must

have wide tracks.

5. Divider resistor R1 and R2 must be placed near the

SET as close as possible.

Figure 1.

Recommended Minimum Footprint

SOT-23-5

0.02

0.038

0.076

Unit : Inch

VIN

GND

VOUT

APL5327

OUT

SET

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