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AD7631BSTZ Datasheet(PDF) 20 Page - Analog Devices |
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AD7631BSTZ Datasheet(HTML) 20 Page - Analog Devices |
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20 / 32 page ![]() AD7631 Rev. A | Page 20 of 32 The four diodes, D1 to D4, provide ESD protection for the analog inputs, IN+ and IN−. Care must be taken to ensure that the analog input signal never exceeds the supply rails by more than 0.3 V, because this causes the diodes to become forward-biased and to start conducting current. These diodes can handle a forward- biased current of 120 mA maximum. For instance, these conditions could eventually occur when the input buffer’s U1 supplies are different from AVDD, VCC, and VEE. In such a case, an input buffer with a short-circuit current limitation can be used to protect the part although most op amps’ short-circuit current is <100 mA. Note that D3 and D4 are only used in the 0 V to 5 V range to allow for additional protection in applications that are switching from the higher voltage ranges. This analog input structure of the AD7631 is a true differential structure allowing the sampling of the differential signal between IN+ and IN−. By using this differential input, small signals common to both inputs are rejected, as shown in Figure 29, which represents the typical CMRR over frequency. 120 0 1 10000 FREQUENCY (kHz) 100 80 60 40 20 10 100 1000 0V TO 10V ±5V 0V TO 5V ±10V Figure 29. Analog Input CMRR vs. Frequency During the acquisition phase for ac signals, the impedance of the analog inputs, IN+ and IN−, can be modeled as a parallel combination of Capacitor CPIN and the network formed by the series connection of RIN and CIN. CPIN is primarily the pin capacitance. RIN is typically 5 kΩ and is a lumped component comprised of serial resistors and the on resistance of the switches. CIN is primarily the ADC sampling capacitor and, depending on the input range selected, is typically 48 pF in the 0 V to 5 V range, typically 24 pF in the 0 V to 10 V and ±5 V ranges, and typically 12 pF in the ±10 V range. During the conversion phase, when the switches are opened, the input impedance is limited to CPIN. Because the input impedance of the AD7631 is very high, it can be directly driven by a low impedance source without gain error. To further improve the noise filtering achieved by the AD7631 analog input circuit, an external, one-pole RC filter between the amplifier’s outputs and the ADC analog inputs can be used, as shown in Figure 27. However, large source impedances significantly affect the ac performance, especially the THD. The maximum source impedance depends on the amount of THD that can be tolerated. The THD degrades as a function of the source impedance and the maximum input frequency, as shown in Figure 30. –130 –110 –90 –70 0 25 50 75 100 15Ω 33Ω 100Ω 200Ω FREQUENCY (kHz) Figure 30. THD vs. Analog Input Frequency and Source Resistance DRIVER AMPLIFIER CHOICE Although the AD7631 is easy to drive, the driver amplifier must meet the following requirements: • For multichannel, multiplexed applications, the driver amplifier and the AD7631 analog input circuit must be able to settle for a full-scale step of the capacitor array at a 18-bit level (0.0004%). For the amplifier, settling at 0.1% to 0.01% is more commonly specified. This differs significantly from the settling time at a 18-bit level and should be verified prior to driver selection. The AD8021 op amp combines ultralow noise with high gain bandwidth and meets this settling time requirement even when used with gains of up to 13. • The noise generated by the driver amplifier needs to be kept as low as possible to preserve the SNR and transition noise performance of the AD7631. The noise coming from the driver is filtered by the external, 1-pole, low-pass filter, as shown in Figure 27. The SNR degradation due to the amplifier is ⎟ ⎟ ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎜ ⎜ ⎝ ⎛ π + π + = − − + − 2 3dB 2 3dB 2 ) ( 2 ) ( 2 log 20 N N NADC NADC LOSS Ne f Ne f V V SNR where: VNADC is the noise of the ADC, which is 20 10 2 2 2 SNR INp-p NADC V V = f–3dB is the cutoff frequency of the input filter (3.9 MHz). |
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