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Revision 1.4

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AS5132

Datasheet - Detailed Descri p ti on

Figure 5. Data Organization of the SSI Protocol 16-Bit Data

Figure 5 shows the organization of the data. The first section is used to setup the operating mode and the address. During write mode the micro

controller drives the data line and generates in addition the CSN and CLK signal. Figure 6 shows this operation.

Figure 6. SSI Timing in Write Mode

Figure 7. SSI Timing in Read Mode

Figure 7 shows the read mode. The first 8 command data bits are written by the microcontroller. After the command data the device takes over

the DIO line and writes the data information. A high impedance phase must be considered before the device drives the output line.

Command Byte

R/

W Data

MSB

LSB MSB

LSB

76

5

4

3

2

10

0

1

2

3

4

15

14

13

12

11

10

CMD 6

CLK

CSN

DIO

D15

command phase

data phase

D14

D0

t1

12

3

CMD 7

D1

8

7

CMD 0

910

11

24

23

D13

CMD 5

t2

t3

t6

CMD 6

CLK

CSN

DIO

D15

command phase

data phase

D14

D0

t1

12

3

CMD 7

D1

8

7

CMD 0

910

11

24

23

D13

CMD 5

Z

t2

t3

t4

t5

t6