R5F110ME datasheet(83/153 Pages) RENESAS

83 / 153 page

RL78/L1C

2. ELECTRICAL SPECIFICATIONS (A: TA = -40 to +85 °C)

R01DS0192EJ0200 Rev. 2.00

Page 83 of 149

Feb 21, 2014

Note 1.

This is a capacitor that is connected between voltage pins used to drive the LCD.

C1: A capacitor connected between CAPH and CAPL

C2: A capacitor connected between VL1 and GND

C3: A capacitor connected between VL2 and GND

C4: A capacitor connected between VL3 and GND

C5: A capacitor connected between VL4 and GND

C1 = C2 = C3 = C4 = 0.47

F30%

Note 2.

This is the time required to wait from when the reference voltage is specified by using the VLCD register (or when the

internal voltage boosting method is selected (by setting the MDSET1 and MDSET0 bits of the LCDM0 register to 01B) if

the default value reference voltage is used) until voltage boosting starts (VLCON = 1).

Note 3.

This is the wait time from when voltage boosting is started (VLCON = 1) until display is enabled (LCDON = 1).

(2)

1/4 bias method

(TA = -40 to +85 °C, 1.8 V  VDD  3.6 V, VSS = 0 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

LCD output voltage variation range

VL1

C1 to C4 Note 1

= 0.47

F Note 2

VLCD = 04H

0.90

1.00

1.08

VLCD = 05H

0.95

1.05

1.13

VLCD = 06H

1.00

1.10

1.18

VLCD = 07H

1.05

1.15

1.23

VLCD = 08H

1.10

1.20

1.28

VLCD = 09H

1.15

1.25

1.33

VLCD = 0AH

1.20

1.30

1.38

Doubler output voltage

VL2

C1 to C4 Note 1 = 0.47

F

2 VL1 - 0.08

2 VL1

Tripler output voltage

VL3

C1 to C4 Note 1 = 0.47

F

3 VL1 - 0.12

3 VL1

Quadruply output voltage

VL4

C1 to C5 Note 1 = 0.47

F

4 VL1 - 0.16

4 VL1

Reference voltage setup time Note 2

tVWAIT1

5ms

Voltage boost wait time Note 3

tVWAIT2

C1 to C5 Note 1 = 0.47

F

500

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