R5F110ME datasheet(19/153 Pages) RENESAS

19 / 153 page

RL78/L1C

1. OUTLINE

R01DS0192EJ0200 Rev. 2.00

Page 19 of 149

Feb 21, 2014

Note 1.

The number in parentheses indicates the number of signal outputs when 8 coms are used.

Note 2.

The illegal instruction is generated when instruction code FFH is executed.

Reset by the illegal instruction execution not is issued by emulation with the in-circuit emulator or on-chip debug

emulator.

(2/2)

Item

80/85-pin

100-pin

R5F111Mx/R5F111Nx (x = E to H, J)

R5F111Px (x = E to H, J)

Clock output/buzzer output

• 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz

(Main system clock: fMAIN = 20 MHz operation)

• 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.096 kHz, 8.192 kHz, 16.384 kHz, 32.768 kHz

(Subsystem clock: fSUB = 32.768 kHz operation)

8/12-bit resolution A/D converter

11 channels

13 channels

D/A converter

2 channels

Comparator

1 channel

2 channels

Serial interface

• CSI: 1 channel/UART (UART supporting LIN-bus): 1 channel/simplified I2C: 1 channel

• CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel

I2C bus

1 channel

LCD controller/driver

Internal voltage boosting method, capacitor split method, and external resistance division method

are switchable.

Segment signal output

44 (40) Note 1

56 (52) Note 1

Common signal output

4 (8) Note 1

Data transfer controller (DTC)

30 sources

31 sources

Event link controller (ELC)

Event input: 30, Event trigger output: 22

Event input: 31, Event trigger output: 22

Vectored interrupt

sources

Internal

External

Key interrupt

Reset

• Reset by RESET pin

• Internal reset by watchdog timer

• Internal reset by power-on-reset

• Internal reset by voltage detector

• Internal reset by illegal instruction execution Note 2

• Internal reset by RAM parity error

• Internal reset by illegal-memory access

Power-on-reset circuit

• Power-on-reset: 1.51

 0.03 V

• Power-down-reset: 1.50

 0.03 V

Voltage detector

• Rising edge: 1.67 V to 3.13 V (12 stages)

• Falling edge: 1.63 V to 3.06 V (12 stages)

On-chip debug function

Provided

Power supply voltage

VDD = 1.6 to 3.6 V

Operating ambient temperature

TA = -40 to +85

C (A: Consumer applications), TA = -40 to +105 C (G: Industrial applications)

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