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OPA890IDBVT Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # OPA890IDBVT
Description  Low-Power, Wideband, Voltage-Feedback OPERATIONAL AMPLIFIER with Disable
PDF  34 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

OPA890IDBVT Datasheet(HTML) 3 Page - National Semiconductor (TI)

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OPA890
www.ti.com
SBOS369B – MAY 2007 – REVISED DECEMBER 2009
ELECTRICAL CHARACTERISTICS: VS = ±5V
Boldface limits are tested at +25°C.
At RF = 750Ω, G = +2V/V, and RL = 100Ω, unless otherwise noted.
OPA890ID, IDBV
TYP
MIN/MAX OVER TEMPERATURE
0°C to
–40°C to
MIN/
TEST
PARAMETER
CONDITIONS
+25°C
+25°C
(2)
+70°C
(3)
+85°C
(3)
UNITS
MAX
LEVEL
(1)
AC PERFORMANCE
Small-Signal Bandwidth
G = +1V/V, VO = 100mVPP, RF = 0Ω
260
MHz
typ
C
G = +2V/V, VO = 100mVPP
115
75
65
60
MHz
min
B
G = +10V/V, VO = 100mVPP
13
9
8
7.5
MHz
min
B
Gain Bandwidth Product
G > +20V/V
130
100
90
85
MHz
min
B
Bandwidth for 0.1dB Flatness
G = +2V/V, VO = 100mVPP
20
MHz
typ
C
Peaking at a Gain of +1V/V
VO < 100mVPP
1
dB
typ
C
Large-Signal Bandwidth
G = +2V/V, VO = 2VPP
170
MHz
typ
C
Slew Rate
G = +2V/V, VO = 2V Step
500
325
300
275
V/
μs
min
B
Rise-and-Fall Time
0.2V Step
3.5
ns
typ
C
Settling Time to 0.02%
G = +1V/V, VO = 2V Step
16
ns
typ
C
Settling Time to 0.1%
10
ns
typ
C
Harmonic Distortion
G = +2V/V, f = 1MHz, VO = 2VPP
2nd-Harmonic
RL = 200Ω
–88
–78
–76
–75
dBc
max
B
RL ≥ 500Ω
–102
–84
–82
–80
dBc
max
B
3rd-Harmonic
RL = 200Ω
–89
–84
–81
–80
dBc
max
B
RL ≥ 500Ω
–94
–90
–87
–86
dBc
max
B
Input Voltage Noise
f > 100kHz
8
9
10
11
nV/
√Hz
max
B
Input Current Noise
f > 100kHz
1
1.3
1.7
1.9
pA/
√Hz
max
B
Differential Gain
G = +2V/V, VO = 1.4VPP, RL = 150Ω
0.05
%
typ
C
Differential Phase
G = +2V/V, VO = 1.4VPP, RL = 150Ω
0.03
°
typ
C
DC PERFORMANCE
(4)
Open-Loop Voltage Gain (AOL)
VO = 0V, RL = 100Ω
62
57
56
54
dB
min
A
Input Offset Voltage
VCM = 0V
±1
±5
±5.7
±6
mV
max
A
Average Offset Voltage Drift
VCM = 0V
±15
±15
μV/°C
max
B
Input Bias Current
VCM = 0V
±0.1
±1.6
±1.8
±2
μA
max
A
Average Input Bias Current Drift
VCM = 0V
±5
±6
nA/°C
max
B
Input Offset Current
VCM = 0V
±70
±350
±450
±500
nA
max
A
Average Input Offset Current Drift
VCM = 0V
±2.5
±2.5
nA/°C
max
B
INPUT
Common-Mode Input Range (CMIR)
(5)
±3.9
±3.7
±3.6
±3.5
V
min
A
Common-Mode Rejection Ratio (CMRR)
VCM = 0V, Input-Referred
67
61
58
57
dB
min
A
Input Impedance
Differential
VCM = 0V
190 || 0.6
k
Ω || pF
typ
C
Common-Mode
VCM = 0V
3.2 || 0.9
M
Ω || pF
typ
C
OUTPUT
Output Voltage Swing
No Load
±4.0
±3.9
±3.8
±3.7
V
min
A
RL = 100Ω
±3.5
±3.1
±3.05
±2.9
V
min
A
Output Current, Sourcing, Sinking
VO = 0V
±40
±35
±33
±30
mA
min
A
Peak Output Current
Output Shorted to Ground
±75
mA
typ
C
Closed-Loop Output Impedance
G = +2V/V, f = 100kHz
0.04
Ω
typ
C
(1)
Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization
and simulation. (C) Typical value only for information.
(2)
Junction temperature = ambient for +25°C tested specifications.
(3)
Junction temperature = ambient at low temperature limit; junction temperature = ambient +2°C at high temperature limit for over
temperature specifications.
(4)
Current is considered positive out-of-node. VCM is the input common-mode voltage.
(5)
Tested < 3dB below minimum specified CMRR at ±CMIR limits
Copyright © 2007–2009, Texas Instruments Incorporated
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