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OPA890IDBVT Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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OPA890IDBVT Datasheet(HTML) 5 Page - National Semiconductor (TI) |
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5 / 34 page ![]() OPA890 www.ti.com SBOS369B – MAY 2007 – REVISED DECEMBER 2009 ELECTRICAL CHARACTERISTICS: VS = +5V Boldface limits are tested at +25°C. At RF = 750Ω, G = +2V/V, and RL = 100Ω, unless otherwise noted. OPA890ID, IDBV TYP MIN/MAX OVER TEMPERATURE 0°C to –40°C to MIN/ TEST PARAMETER CONDITIONS +25°C +25°C (2) +70°C (3) +85°C (3) UNITS MAX LEVEL (1) AC PERFORMANCE Small-Signal Bandwidth G = +1V/V, VO = 100mVPP, RF = 0Ω 220 MHz typ C G = +2V/V, VO = 100mVPP 105 70 60 55 MHz min B G = +10V/V, VO = 100mVPP 12 8 6.8 6.3 MHz min B Gain Bandwidth Product G > +20V/V 125 90 75 70 MHz min B Bandwidth for 0.1dB Flatness G = +2V/V, VO = 100mVPP 16 MHz typ C Peaking at a Gain of +1V/V VO < 100mVPP 2 dB typ C Large-Signal Bandwidth G = +2V/V, VO = 2VPP 130 MHz typ C Slew Rate G = +2V/V, VO = 2V Step 350 250 200 175 V/ μs min B Rise-and-Fall Time 0.2V Step 3.8 ns typ C Settling Time to 0.02% G = +1V/V, VO = 2V Step 18 ns typ C Settling Time to 0.1% 12 ns typ C Harmonic Distortion G = +2V/V, f = 1MHz, VO = 2VPP 2nd-Harmonic RL = 200Ω –85 –76 -73 -72 dBc max B RL ≥ 500Ω –90 –78 –74 –73 dBc max B 3rd-Harmonic RL = 200Ω –85 –81 –79 –78 dBc max B RL ≥ 500Ω –87 –84 –82 –81 dBc max B Input Voltage Noise f > 100kHz 8.1 9.1 10.1 11.1 nV/ √Hz max B Input Current Noise f > 100kHz 1.1 1.4 1.7 2.0 pA/ √Hz max B Differential Gain G = +2V/V, VO = 1.4VPP, RL = 150Ω 0.06 % typ C Differential Phase G = +2V/V, VO = 1.4VPP, RL = 150Ω 0.04 ° typ C Channel-to-Channel Crosstalk f = 5MHz, Input-Referred –68 dB typ C DC PERFORMANCE (4) Open-Loop Voltage Gain (AOL) VO = VS/2, RL = 100Ω 60 55 54 52 dB min A Input Offset Voltage VCM = VS/2 ±1 ±5 ±5.7 ±6 mV max A Average Offset Voltage Drift VCM = VS/2 ±15 ±15 μV/°C max B Input Bias Current VCM = VS/2 ±0.1 ±1.7 ±1.9 ±2.1 μA max A Average Input Bias Current Drift VCM = VS/2 ±5 ±6 nA/°C max B Input Offset Current VCM = VS/2 ±70 ±400 ±500 ±550 nA max A Average Input Offset Current Drift VCM = VS/2 ±2.5 ±2.5 nA/°C max B INPUT Most Positive Input Voltage (5) +4 +3.7 +3.65 +3.6 V min A Least Positive Input Voltage (5) +1 +1.3 +1.3 +1.4 V max A Common-Mode Rejection Ratio (CMRR) VCM = VS/2, Input-Referred 65 59 56 55 dB min A Input Impedance Differential VCM = VS/2 190 || 0.6 k Ω || pF typ C Common-Mode VCM = VS/2 3.2 || 0.9 M Ω || pF typ C OUTPUT Most Positive Output Voltage No Load +4.0 +3.9 +3.85 +3.8 V min A RL = 100Ω +3.9 +3.75 +3.7 +3.65 V min A Least Positive Output Voltage No Load +1.0 +1.1 +1.15 +1.2 V max A RL = 100Ω +1.1 +1.35 +1.4 +1.45 V max A Output Current: Sourcing, Sinking VO = VS/2 ±35 ±30 ±28 ±25 mA min A Short-Circuit Output Current Output Shorted to Ground ±65 mA typ C Closed-Loop Output Impedance G = +2V/V, f = 100kHz 0.04 Ω typ C (1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. (2) Junction temperature = ambient for +25°C tested specifications. (3) Junction temperature = ambient at low temperature limit; junction temperature = ambient +2°C at high temperature limit for over temperature specifications. (4) Current is considered positive out-of-node. VCM is the input common-mode voltage. (5) Tested < 3dB below minimum specified CMRR at ±CMIR limits Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): OPA890 |
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