THS4052CD datasheet(14/36 Pages) NSC

14 / 36 page

THS4051

THS4052

SLOS238D − MAY 1999 − REVISED AUGUST 2008

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APPLICATION INFORMATION

THEORY OF OPERATION

The THS405x is a high-speed operational amplifier

configured in a voltage feedback architecture. It is built

using a 30-V, dielectrically isolated, complementary

bipolar process with NPN and PNP transistors possessing

fTs of several GHz. This results in an exceptionally high

performance amplifier that has a wide bandwidth, high

slew rate, fast settling time, and low distortion. A simplified

schematic is shown in Figure 42.

IN − (2)

IN + (3)

NULL (1)

NULL (8)

(6) OUT

(4) VCC −

(7) VCC +

Figure 42. THS405x Simplified Schematic

NOISE CALCULATIONS AND NOISE FIGURE

Noise can cause errors on very small signals. This is especially true when amplifying small signals, where signal-to-noise

ratio (SNR) is very important. The noise model for the THS405x is shown in Figure 43. This model includes all of the noise

sources as follows:

• e

n = Amplifier internal voltage noise (nV/√Hz)

• IN+ = Noninverting current noise (pA/√Hz)

• IN− = Inverting current noise (pA/√Hz)

• e

Rx = Thermal voltage noise associated with each resistor (eRx = 4 kTRx )

THS4052CD Datasheet(PDF) 14 Page - National Semiconductor (TI)