AS3911B datasheet(29/155 Pages) AMSCO

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ams Datasheet: 2014-Jun-12 [v1-08]

AS3911B – 29

Appl icatio n I n f o rm a t i o n

Quartz Crystal Oscillator

The quartz crystal oscillator can operate with 13.56 MHz and

27.12 MHz crystals. The operation of quartz crystal oscillator is

enabled when the Operation Control Register bit en is set to

one. An interrupt is sent to inform the microcontroller when the

oscillator frequency is stable (see Main Interrupt Register).

The status of oscillator can be observed by observing the

Auxiliary Display Register bit osc_ok. This bit is set to ‘1’ when

oscillator frequency is stable.

The oscillator is based on an inverter stage supplied by

controlled current source. A feedback loop is controlling the

bias current in order to regulate amplitude on XTI pin to 1 Vpp.

This feedback assures reliable operation even in case of low

quality crystals with Rs up to 50 Ω.In order to enable a fast reader

start-up an interrupt is sent when oscillator amplitude exceeds

750 mVpp.

Division by two assures that 13.56 MHz signal has a duty cycle

of 50% which is better for the Transmitter performance (no PW

distortion). Use of 27.12 MHz crystal is therefore recommended

for better performance.

In case of 13.56 MHz crystal, the bias current of stage which is

digitizing oscillator signal is increased to assure as low PW

distortion as possible.

Please note that in case of VHBR reception (bit rates fc/8 and

above) it is mandatory to use the 27.12 MHz crystal since high

frequency clock is needed for receive framing.

The oscillator output is also used to drive a clock signal output

pin MCU_CLK), which can be used by the external

microcontroller. The MCU_CLK pin is configured in the IO

Configuration Register 2.

Timers

The AS3911B contains several timers which eliminate the need

to run counters in the controller, thus reducing the effort of the

controller code implementation and improve portability of

code to different controllers.

Every timer has one or more associated configuration registers

in which the timeout duration and different operating modes

are defined. These configuration registers have to be set while

the corresponding timer is not running. Any modification of

timer configuration while the timer is active may result in

unpredictable behavior.

All timers except the Wake-up timer are stopped by direct

command Clear.

Exception: In case bit nrt_emv in the General Purpose and

No-response Timer Control Register is set to one, the

No-response timer is not stopped.

AS3911B Datasheet(PDF) 29 Page - ams AG

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