AS3911B datasheet(46/155 Pages) AMSCO

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AS3911B – 46

ams Datasheet: 2014-Jun-12 [v1-08]

A p pl i c at io n I n f o r m at i o n

Figure 33:

SPI Read Timing

Interrupt Interface

There are three interrupt registers implemented in the AS3911B

(Main Interrupt Register and auxiliary Timer and NFC Interrupt

Interrupt Register contains information about six interrupt

sources, while two bits reference to interrupt sources detailed

in Timer and NFC Interrupt Register and Error and Wake-up

Interrupt Register.

When an interrupt condition is met the source of interrupt bit

is set in the Main Interrupt Register and the IRQ pin transitions

to high.

The microcontroller then reads the Main Interrupt Register to

distinguish between different interrupt sources. The interrupt

registers 0x17, 0x18 and 0x19 are to be read in one attempt.

After a particular Interrupt Register is read, its content is reset

to 0. Exceptions to this rule are the bits pointing to auxiliary

registers. These bits are only cleared when corresponding

auxiliary register is read. IRQ pin transitions to low after the

interrupt bit(s) which caused its transition to high has been

read. Please note that there may be more than one interrupt

bits set in case the microcontroller did not immediately read

the interrupt registers after the IRQ signal was set and another

event causing interrupt occurred. In that case the IRQ pin

transitions to low after the last bit which caused interrupt is

read.

In case an interrupt from a certain source is not required it can

be disabled by setting corresponding bit in the Mask Interrupt

registers. In case of masking a certain interrupt source the

interrupt is not produced, but the source of interrupt bit is still

set in interrupt registers.

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AS3911B Datasheet(PDF) 46 Page - ams AG

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