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CDP1826C Datasheet(PDF) 9 Page - Intersil Corporation

Part # CDP1826C
Description  CMOS 64-Word x 8-Bit Static RAM
PDF  9 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CDP1826C Datasheet(HTML) 9 Page - Intersil Corporation

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All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
Data Retention Specifications At TA = -40 to +85oC, see Figure 8
PARAMETER
TEST
CONDITIONS
VDD
(V)
MIN
(NOTE 1)
TYP
LIMITS
UNITS
CDP1826C
VDR
(V)
MAX
Minimum Data Retention
Voltage
VDR
-
-
-
2
2.5
V
Data Retention Quiescent
Current
tDD
2.5
-
-
5
25
µA
Chip Deselect to Data
Retention Time
tCDR
-
5
600
-
-
ns
Recovery to Normal
Operation Time
tRC
-
5
600
-
-
ns
VDD to VDR Rise and
Fall Time
tR, tF
2.5
5
1
-
-
µA
NOTE:
1. Typical values are or TA = 25
oC and nominal V
DD.
CS1
DATA RETENTION
MODE
0.95 VDD
VDR
0.95 VDD
tF
tR
tRC
VIH
VIL
VIH
VIL
VDD
tCDR
FIGURE 8. LOW VDD DATA RETENTION TIMING WAVEFORMS
CDP1826C



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