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AN4371 Datasheet(PDF) 14 Page - STMicroelectronics |
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AN4371 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 29 page ![]() ADC built-in self-test algorithms AN4371 14/29 DocID025337 Rev 1 conversions are distant in term of time, there is a temporal non-correlation that makes the result unreliable. With S algorithm S0 (step) is measured if the ADC internal bandgap voltage (Vref) is proper. If yes, then it is feasible to measure the supply voltage. In case that S1 measurement is delayed from the S0 measurement, then a reference voltage drop may occur. Performing then S1 measurement, where are to be used S0 results, which was good at the time when it were measured, but not correct for actual measurement. The problem may be masked here. This is the reason why is ADC one-shot conversion mode not suitable for algorithm S measurement. In the ideal environment results must be same in both, one-shot and scan mode. Because there is never any voltage drop in the ADC reference or supply due to ideal environment. Figure 7. ADC self-test configuration – Algorithm S On Figure 8 below is presented the basic self-test flow for algorithm S. The test channel is started automatically after normal channel conversion as presented on Figure 9. |
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