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AN1059 Datasheet(PDF) 10 Page - STMicroelectronics |
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AN1059 Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 20 page ![]() where JH (Kv) and JE (Kv) are functions related to hysteresis and eddy current losses, whose best fit ap- proximation are respectively: JH (Kv) ≈ 1.87 + 1.26 ⋅ Kv 1 + 0.55 ⋅ Kv ⋅ 10−5 JE(Kv) ≈ 1.88 + 1.06 ⋅ Kv 1 + 0.34 ⋅ Kv ⋅ 10−10. Formula (17) assumes that the maximum peak flux density inside the core is limited by core saturation and that all transformer losses are located in the windings; (18) assumes that core losses limit the flux swing and the total dissipation are half due to core losses and half to windings losses. Common to both formulae are the following assumptions: 1. the material is a typical power ferrite (3C85 from Philips, N67 from Siemens or similar grades) with a saturation flux density above 0.3 Tesla; 2. the windings occupy 40% of the total window area to leave space for isolation lay- ers, creepage and clearance distances; 3. primary and secondary winding wires are proportioned for equal RMS current den- sity; 4. core and/or copper losses result in 30 °C hot spot temperature rise (no forced cooling); 5. skin and proximity effects are neglected, considering the frequency range involved. For a given fswmin, one should try both formu- lae (considering Kv at minimum line voltage) and use the higher resulting value. Core losses become dominant for core selection above 45 kHz at this power level. In fig. 11, the higher value resulting from (17) and (18) is plotted against fswmin for different values of Kv, considering 30W output power with an estimate of 85% efficiency. Clamp network The overvoltage spikes due to the leakage inductance of the trans- former are usually limited by an RCD clamp network, as illustrated in fig. 12a. It can be advantageous the use of a zener (or transil) clamp (see fig. 12b) when minimisation of power losses at light load is de- sired. Considering the RCD clamp, the capacitor is selected so as to have an assigned overvoltage ∆V (as a rule of thumb, half the reflected voltage) at turn-off such that the voltage rating of the MOSFET is never ex- ceeded. From energetic balance, it is possible to write: Cmin = Llk ⋅ IPKpmax 2 ∆V ⋅ (∆V + 2 ⋅ VR) , where Llk is the leakage inductance, which can be estimated in the range of 1 to 3% of the primary inductance if the transformer is properly manufactured, and: IPKpmax = 2 ⋅ Pinmax VPKmin ⋅ F2(Kvmin) The capacitor undergoes large current spikes and therefore it should be a very low ESR type with polypropylene or polystyrene film dielec- tric. 2 10 4 2.5 10 4 3 10 4 3.5 10 4 4 10 4 4.5 10 4 5 10 4 5.5 10 4 6 10 4 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 V( ) , fmin 0.5 V( ) , fmin 1 V( ) , fmin 1.5 V( ) , fmin 2 V( ) , fmin 2.5 fmin Kv = 0.5 Kv = 1 Kv = 1.5 Kv = 2.5 Kv = 2 fswmin [Hz] AP [cm ] 4 Figure 11. Minimum Transformer AP required for a 30W application. R C D Figure 12a. RCD Clamp. D T Figure 12b. Zener (Transil) Clamp. AN1059 APPLICATION NOTE 10/20 |
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